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8796933843
As we are going to add support for the Allwinner DE2 engine in sun4i-drm driver, we will finally have two types of display engines -- the DE1 backend and the DE2 mixer. They both do some display blending and feed graphics data to TCON, and is part of the "Display Engine" called by Allwinner, so I choose to call them both "engine" here. Abstract the engine type to a new struct with an ops struct, which contains functions that should be called outside the engine-specified code (in TCON, CRTC or TV Encoder code). In order to preserve bisectability, we also switch the backend and layer code in its own module. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
201 lines
5.1 KiB
C
201 lines
5.1 KiB
C
/*
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* Copyright (C) 2015 Free Electrons
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* Copyright (C) 2015 NextThing Co
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*
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_modes.h>
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#include <linux/clk-provider.h>
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#include <linux/ioport.h>
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#include <linux/of_address.h>
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#include <linux/of_graph.h>
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#include <linux/of_irq.h>
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#include <linux/regmap.h>
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#include <video/videomode.h>
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#include "sun4i_crtc.h"
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#include "sun4i_drv.h"
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#include "sunxi_engine.h"
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#include "sun4i_tcon.h"
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static void sun4i_crtc_atomic_begin(struct drm_crtc *crtc,
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struct drm_crtc_state *old_state)
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{
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struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
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struct drm_device *dev = crtc->dev;
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unsigned long flags;
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if (crtc->state->event) {
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WARN_ON(drm_crtc_vblank_get(crtc) != 0);
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spin_lock_irqsave(&dev->event_lock, flags);
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scrtc->event = crtc->state->event;
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spin_unlock_irqrestore(&dev->event_lock, flags);
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crtc->state->event = NULL;
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}
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}
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static void sun4i_crtc_atomic_flush(struct drm_crtc *crtc,
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struct drm_crtc_state *old_state)
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{
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struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
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struct drm_pending_vblank_event *event = crtc->state->event;
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DRM_DEBUG_DRIVER("Committing plane changes\n");
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sunxi_engine_commit(scrtc->engine);
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if (event) {
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crtc->state->event = NULL;
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spin_lock_irq(&crtc->dev->event_lock);
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if (drm_crtc_vblank_get(crtc) == 0)
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drm_crtc_arm_vblank_event(crtc, event);
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else
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drm_crtc_send_vblank_event(crtc, event);
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spin_unlock_irq(&crtc->dev->event_lock);
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}
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}
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static void sun4i_crtc_disable(struct drm_crtc *crtc)
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{
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struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
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DRM_DEBUG_DRIVER("Disabling the CRTC\n");
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sun4i_tcon_disable(scrtc->tcon);
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if (crtc->state->event && !crtc->state->active) {
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spin_lock_irq(&crtc->dev->event_lock);
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drm_crtc_send_vblank_event(crtc, crtc->state->event);
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spin_unlock_irq(&crtc->dev->event_lock);
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crtc->state->event = NULL;
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}
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}
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static void sun4i_crtc_enable(struct drm_crtc *crtc)
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{
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struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
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DRM_DEBUG_DRIVER("Enabling the CRTC\n");
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sun4i_tcon_enable(scrtc->tcon);
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}
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static const struct drm_crtc_helper_funcs sun4i_crtc_helper_funcs = {
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.atomic_begin = sun4i_crtc_atomic_begin,
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.atomic_flush = sun4i_crtc_atomic_flush,
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.disable = sun4i_crtc_disable,
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.enable = sun4i_crtc_enable,
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};
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static int sun4i_crtc_enable_vblank(struct drm_crtc *crtc)
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{
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struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
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DRM_DEBUG_DRIVER("Enabling VBLANK on crtc %p\n", crtc);
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sun4i_tcon_enable_vblank(scrtc->tcon, true);
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return 0;
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}
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static void sun4i_crtc_disable_vblank(struct drm_crtc *crtc)
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{
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struct sun4i_crtc *scrtc = drm_crtc_to_sun4i_crtc(crtc);
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DRM_DEBUG_DRIVER("Disabling VBLANK on crtc %p\n", crtc);
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sun4i_tcon_enable_vblank(scrtc->tcon, false);
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}
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static const struct drm_crtc_funcs sun4i_crtc_funcs = {
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.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
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.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
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.destroy = drm_crtc_cleanup,
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.page_flip = drm_atomic_helper_page_flip,
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.reset = drm_atomic_helper_crtc_reset,
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.set_config = drm_atomic_helper_set_config,
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.enable_vblank = sun4i_crtc_enable_vblank,
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.disable_vblank = sun4i_crtc_disable_vblank,
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};
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struct sun4i_crtc *sun4i_crtc_init(struct drm_device *drm,
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struct sunxi_engine *engine,
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struct sun4i_tcon *tcon)
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{
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struct sun4i_crtc *scrtc;
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struct drm_plane **planes;
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struct drm_plane *primary = NULL, *cursor = NULL;
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int ret, i;
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scrtc = devm_kzalloc(drm->dev, sizeof(*scrtc), GFP_KERNEL);
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if (!scrtc)
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return ERR_PTR(-ENOMEM);
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scrtc->engine = engine;
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scrtc->tcon = tcon;
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/* Create our layers */
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planes = sunxi_engine_layers_init(drm, engine);
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if (IS_ERR(planes)) {
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dev_err(drm->dev, "Couldn't create the planes\n");
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return NULL;
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}
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/* find primary and cursor planes for drm_crtc_init_with_planes */
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for (i = 0; planes[i]; i++) {
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struct drm_plane *plane = planes[i];
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switch (plane->type) {
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case DRM_PLANE_TYPE_PRIMARY:
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primary = plane;
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break;
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case DRM_PLANE_TYPE_CURSOR:
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cursor = plane;
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break;
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default:
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break;
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}
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}
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ret = drm_crtc_init_with_planes(drm, &scrtc->crtc,
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primary,
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cursor,
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&sun4i_crtc_funcs,
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NULL);
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if (ret) {
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dev_err(drm->dev, "Couldn't init DRM CRTC\n");
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return ERR_PTR(ret);
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}
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drm_crtc_helper_add(&scrtc->crtc, &sun4i_crtc_helper_funcs);
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/* Set crtc.port to output port node of the tcon */
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scrtc->crtc.port = of_graph_get_port_by_id(scrtc->tcon->dev->of_node,
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1);
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/* Set possible_crtcs to this crtc for overlay planes */
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for (i = 0; planes[i]; i++) {
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uint32_t possible_crtcs = BIT(drm_crtc_index(&scrtc->crtc));
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struct drm_plane *plane = planes[i];
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if (plane->type == DRM_PLANE_TYPE_OVERLAY)
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plane->possible_crtcs = possible_crtcs;
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}
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return scrtc;
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}
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