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fcf7157ba3
"struct davinci_uart_config" was introduced to specify UART ports brought out or enabled on the board. But none of the boards use it for that purpose and we are not going to add anymore board files, so remove the structure. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Suggested-by: Sekhar Nori <nsekhar@ti.com> [nsekhar@ti.com: split patch to remove davinci_serial_setup_clk() changes.] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
131 lines
3.3 KiB
C
131 lines
3.3 KiB
C
/*
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* TI DaVinci serial driver
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*
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* Copyright (C) 2006 Texas Instruments.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <mach/serial.h>
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#include <mach/cputype.h>
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static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
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int offset)
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{
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offset <<= up->regshift;
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WARN_ONCE(!up->membase, "unmapped read: uart[%d]\n", offset);
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return (unsigned int)__raw_readl(up->membase + offset);
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}
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static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
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int value)
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{
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offset <<= p->regshift;
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WARN_ONCE(!p->membase, "unmapped write: uart[%d]\n", offset);
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__raw_writel(value, p->membase + offset);
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}
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static void __init davinci_serial_reset(struct plat_serial8250_port *p)
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{
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unsigned int pwremu = 0;
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serial_write_reg(p, UART_IER, 0); /* disable all interrupts */
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/* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */
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serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
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mdelay(10);
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pwremu |= (0x3 << 13);
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pwremu |= 0x1;
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serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
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if (cpu_is_davinci_dm646x())
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serial_write_reg(p, UART_DM646X_SCR,
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UART_DM646X_SCR_TX_WATERMARK);
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}
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/* Enable UART clock and obtain its rate */
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int __init davinci_serial_setup_clk(unsigned instance, unsigned int *rate)
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{
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struct clk *clk;
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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struct device *dev = &soc_info->serial_dev[instance].dev;
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clk = clk_get(dev, NULL);
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if (IS_ERR(clk)) {
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pr_err("%s:%d: failed to get UART%d clock\n",
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__func__, __LINE__, instance);
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return PTR_ERR(clk);
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}
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clk_prepare_enable(clk);
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if (rate)
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*rate = clk_get_rate(clk);
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return 0;
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}
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int __init davinci_serial_init(struct platform_device *serial_dev)
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{
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int i, ret = 0;
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struct device *dev;
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struct plat_serial8250_port *p;
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/*
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* Make sure the serial ports are muxed on at this point.
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* You have to mux them off in device drivers later on if not needed.
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*/
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for (i = 0; serial_dev[i].dev.platform_data != NULL; i++) {
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dev = &serial_dev[i].dev;
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p = dev->platform_data;
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ret = platform_device_register(&serial_dev[i]);
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if (ret)
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continue;
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ret = davinci_serial_setup_clk(i, &p->uartclk);
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if (ret)
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continue;
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if (!p->membase && p->mapbase) {
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p->membase = ioremap(p->mapbase, SZ_4K);
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if (p->membase)
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p->flags &= ~UPF_IOREMAP;
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else
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pr_err("uart regs ioremap failed\n");
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}
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if (p->membase && p->type != PORT_AR7)
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davinci_serial_reset(p);
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}
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return ret;
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}
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