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987bcdacb1
Drop support to compile the kernel with gcc versions older than 3.3.3. This allows us to use the "Q" inline assembly contraint on some more inline assemblies without duplicating a lot of complex code (e.g. __xchg and __cmpxchg). The distinction for older gcc versions can be removed which saves a few lines and simplifies the code. Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
259 lines
7.4 KiB
C
259 lines
7.4 KiB
C
/*
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* include/asm-s390/etr.h
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*
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* Copyright IBM Corp. 2006
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* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
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*/
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#ifndef __S390_ETR_H
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#define __S390_ETR_H
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/* ETR attachment control register */
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struct etr_eacr {
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unsigned int e0 : 1; /* port 0 stepping control */
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unsigned int e1 : 1; /* port 1 stepping control */
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unsigned int _pad0 : 5; /* must be 00100 */
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unsigned int dp : 1; /* data port control */
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unsigned int p0 : 1; /* port 0 change recognition control */
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unsigned int p1 : 1; /* port 1 change recognition control */
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unsigned int _pad1 : 3; /* must be 000 */
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unsigned int ea : 1; /* ETR alert control */
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unsigned int es : 1; /* ETR sync check control */
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unsigned int sl : 1; /* switch to local control */
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} __attribute__ ((packed));
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/* Port state returned by steai */
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enum etr_psc {
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etr_psc_operational = 0,
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etr_psc_semi_operational = 1,
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etr_psc_protocol_error = 4,
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etr_psc_no_symbols = 8,
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etr_psc_no_signal = 12,
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etr_psc_pps_mode = 13
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};
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/* Logical port state returned by stetr */
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enum etr_lpsc {
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etr_lpsc_operational_step = 0,
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etr_lpsc_operational_alt = 1,
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etr_lpsc_semi_operational = 2,
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etr_lpsc_protocol_error = 4,
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etr_lpsc_no_symbol_sync = 8,
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etr_lpsc_no_signal = 12,
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etr_lpsc_pps_mode = 13
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};
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/* ETR status words */
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struct etr_esw {
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struct etr_eacr eacr; /* attachment control register */
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unsigned int y : 1; /* stepping mode */
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unsigned int _pad0 : 5; /* must be 00000 */
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unsigned int p : 1; /* stepping port number */
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unsigned int q : 1; /* data port number */
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unsigned int psc0 : 4; /* port 0 state code */
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unsigned int psc1 : 4; /* port 1 state code */
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} __attribute__ ((packed));
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/* Second level data register status word */
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struct etr_slsw {
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unsigned int vv1 : 1; /* copy of validity bit data frame 1 */
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unsigned int vv2 : 1; /* copy of validity bit data frame 2 */
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unsigned int vv3 : 1; /* copy of validity bit data frame 3 */
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unsigned int vv4 : 1; /* copy of validity bit data frame 4 */
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unsigned int _pad0 : 19; /* must by all zeroes */
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unsigned int n : 1; /* EAF port number */
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unsigned int v1 : 1; /* validity bit ETR data frame 1 */
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unsigned int v2 : 1; /* validity bit ETR data frame 2 */
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unsigned int v3 : 1; /* validity bit ETR data frame 3 */
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unsigned int v4 : 1; /* validity bit ETR data frame 4 */
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unsigned int _pad1 : 4; /* must be 0000 */
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} __attribute__ ((packed));
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/* ETR data frames */
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struct etr_edf1 {
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unsigned int u : 1; /* untuned bit */
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unsigned int _pad0 : 1; /* must be 0 */
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unsigned int r : 1; /* service request bit */
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unsigned int _pad1 : 4; /* must be 0000 */
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unsigned int a : 1; /* time adjustment bit */
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unsigned int net_id : 8; /* ETR network id */
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unsigned int etr_id : 8; /* id of ETR which sends data frames */
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unsigned int etr_pn : 8; /* port number of ETR output port */
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} __attribute__ ((packed));
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struct etr_edf2 {
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unsigned int etv : 32; /* Upper 32 bits of TOD. */
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} __attribute__ ((packed));
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struct etr_edf3 {
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unsigned int rc : 8; /* failure reason code */
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unsigned int _pad0 : 3; /* must be 000 */
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unsigned int c : 1; /* ETR coupled bit */
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unsigned int tc : 4; /* ETR type code */
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unsigned int blto : 8; /* biased local time offset */
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/* (blto - 128) * 15 = minutes */
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unsigned int buo : 8; /* biased utc offset */
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/* (buo - 128) = leap seconds */
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} __attribute__ ((packed));
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struct etr_edf4 {
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unsigned int ed : 8; /* ETS device dependent data */
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unsigned int _pad0 : 1; /* must be 0 */
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unsigned int buc : 5; /* biased ut1 correction */
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/* (buc - 16) * 0.1 seconds */
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unsigned int em : 6; /* ETS error magnitude */
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unsigned int dc : 6; /* ETS drift code */
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unsigned int sc : 6; /* ETS steering code */
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} __attribute__ ((packed));
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/*
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* ETR attachment information block, two formats
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* format 1 has 4 reserved words with a size of 64 bytes
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* format 2 has 16 reserved words with a size of 96 bytes
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*/
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struct etr_aib {
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struct etr_esw esw;
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struct etr_slsw slsw;
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unsigned long long tsp;
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struct etr_edf1 edf1;
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struct etr_edf2 edf2;
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struct etr_edf3 edf3;
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struct etr_edf4 edf4;
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unsigned int reserved[16];
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} __attribute__ ((packed,aligned(8)));
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/* ETR interruption parameter */
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struct etr_irq_parm {
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unsigned int _pad0 : 8;
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unsigned int pc0 : 1; /* port 0 state change */
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unsigned int pc1 : 1; /* port 1 state change */
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unsigned int _pad1 : 3;
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unsigned int eai : 1; /* ETR alert indication */
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unsigned int _pad2 : 18;
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} __attribute__ ((packed));
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/* Query TOD offset result */
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struct etr_ptff_qto {
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unsigned long long physical_clock;
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unsigned long long tod_offset;
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unsigned long long logical_tod_offset;
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unsigned long long tod_epoch_difference;
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} __attribute__ ((packed));
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/* Inline assembly helper functions */
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static inline int etr_setr(struct etr_eacr *ctrl)
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{
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int rc = -ENOSYS;
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asm volatile(
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" .insn s,0xb2160000,%1\n"
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"0: la %0,0\n"
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"1:\n"
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EX_TABLE(0b,1b)
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: "+d" (rc) : "Q" (*ctrl));
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return rc;
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}
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/* Stores a format 1 aib with 64 bytes */
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static inline int etr_stetr(struct etr_aib *aib)
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{
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int rc = -ENOSYS;
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asm volatile(
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" .insn s,0xb2170000,%1\n"
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"0: la %0,0\n"
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"1:\n"
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EX_TABLE(0b,1b)
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: "+d" (rc) : "Q" (*aib));
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return rc;
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}
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/* Stores a format 2 aib with 96 bytes for specified port */
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static inline int etr_steai(struct etr_aib *aib, unsigned int func)
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{
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register unsigned int reg0 asm("0") = func;
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int rc = -ENOSYS;
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asm volatile(
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" .insn s,0xb2b30000,%1\n"
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"0: la %0,0\n"
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"1:\n"
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EX_TABLE(0b,1b)
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: "+d" (rc) : "Q" (*aib), "d" (reg0));
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return rc;
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}
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/* Function codes for the steai instruction. */
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#define ETR_STEAI_STEPPING_PORT 0x10
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#define ETR_STEAI_ALTERNATE_PORT 0x11
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#define ETR_STEAI_PORT_0 0x12
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#define ETR_STEAI_PORT_1 0x13
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static inline int etr_ptff(void *ptff_block, unsigned int func)
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{
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register unsigned int reg0 asm("0") = func;
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register unsigned long reg1 asm("1") = (unsigned long) ptff_block;
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int rc = -ENOSYS;
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asm volatile(
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" .word 0x0104\n"
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" ipm %0\n"
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" srl %0,28\n"
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: "=d" (rc), "=m" (ptff_block)
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: "d" (reg0), "d" (reg1), "m" (ptff_block) : "cc");
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return rc;
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}
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/* Function codes for the ptff instruction. */
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#define ETR_PTFF_QAF 0x00 /* query available functions */
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#define ETR_PTFF_QTO 0x01 /* query tod offset */
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#define ETR_PTFF_QSI 0x02 /* query steering information */
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#define ETR_PTFF_ATO 0x40 /* adjust tod offset */
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#define ETR_PTFF_STO 0x41 /* set tod offset */
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#define ETR_PTFF_SFS 0x42 /* set fine steering rate */
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#define ETR_PTFF_SGS 0x43 /* set gross steering rate */
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/* Functions needed by the machine check handler */
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void etr_switch_to_local(void);
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void etr_sync_check(void);
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/* STP interruption parameter */
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struct stp_irq_parm {
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unsigned int _pad0 : 14;
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unsigned int tsc : 1; /* Timing status change */
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unsigned int lac : 1; /* Link availability change */
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unsigned int tcpc : 1; /* Time control parameter change */
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unsigned int _pad2 : 15;
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} __attribute__ ((packed));
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#define STP_OP_SYNC 1
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#define STP_OP_CTRL 3
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struct stp_sstpi {
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unsigned int rsvd0;
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unsigned int rsvd1 : 8;
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unsigned int stratum : 8;
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unsigned int vbits : 16;
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unsigned int leaps : 16;
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unsigned int tmd : 4;
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unsigned int ctn : 4;
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unsigned int rsvd2 : 3;
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unsigned int c : 1;
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unsigned int tst : 4;
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unsigned int tzo : 16;
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unsigned int dsto : 16;
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unsigned int ctrl : 16;
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unsigned int rsvd3 : 16;
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unsigned int tto;
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unsigned int rsvd4;
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unsigned int ctnid[3];
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unsigned int rsvd5;
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unsigned int todoff[4];
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unsigned int rsvd6[48];
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} __attribute__ ((packed));
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/* Functions needed by the machine check handler */
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void stp_sync_check(void);
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void stp_island_check(void);
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#endif /* __S390_ETR_H */
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