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2138f8853a
MAX16601 is a VR13.HC Dual-Output Voltage Regulator Chipset, implementing a (8+1) multiphase synchronous buck converter. Cc: Alex Qiu <xqiu@google.com> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
160 lines
3.8 KiB
ReStructuredText
160 lines
3.8 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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Kernel driver max16601
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======================
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Supported chips:
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* Maxim MAX16601
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Prefix: 'max16601'
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Addresses scanned: -
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Datasheet: Not published
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Author: Guenter Roeck <linux@roeck-us.net>
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Description
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-----------
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This driver supports the MAX16601 VR13.HC Dual-Output Voltage Regulator
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Chipset.
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The driver is a client driver to the core PMBus driver.
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Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers.
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Usage Notes
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-----------
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This driver does not auto-detect devices. You will have to instantiate the
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devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for
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details.
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Platform data support
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---------------------
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The driver supports standard PMBus driver platform data.
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Sysfs entries
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-------------
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The following attributes are supported.
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======================= =======================================================
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in1_label "vin1"
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in1_input VCORE input voltage.
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in1_alarm Input voltage alarm.
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in2_label "vout1"
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in2_input VCORE output voltage.
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in2_alarm Output voltage alarm.
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curr1_label "iin1"
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curr1_input VCORE input current, derived from duty cycle and output
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current.
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curr1_max Maximum input current.
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curr1_max_alarm Current high alarm.
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curr2_label "iin1.0"
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curr2_input VCORE phase 0 input current.
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curr3_label "iin1.1"
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curr3_input VCORE phase 1 input current.
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curr4_label "iin1.2"
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curr4_input VCORE phase 2 input current.
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curr5_label "iin1.3"
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curr5_input VCORE phase 3 input current.
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curr6_label "iin1.4"
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curr6_input VCORE phase 4 input current.
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curr7_label "iin1.5"
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curr7_input VCORE phase 5 input current.
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curr8_label "iin1.6"
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curr8_input VCORE phase 6 input current.
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curr9_label "iin1.7"
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curr9_input VCORE phase 7 input current.
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curr10_label "iin2"
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curr10_input VCORE input current, derived from sensor element.
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curr11_label "iin3"
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curr11_input VSA input current.
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curr12_label "iout1"
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curr12_input VCORE output current.
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curr12_crit Critical output current.
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curr12_crit_alarm Output current critical alarm.
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curr12_max Maximum output current.
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curr12_max_alarm Output current high alarm.
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curr13_label "iout1.0"
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curr13_input VCORE phase 0 output current.
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curr14_label "iout1.1"
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curr14_input VCORE phase 1 output current.
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curr15_label "iout1.2"
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curr15_input VCORE phase 2 output current.
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curr16_label "iout1.3"
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curr16_input VCORE phase 3 output current.
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curr17_label "iout1.4"
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curr17_input VCORE phase 4 output current.
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curr18_label "iout1.5"
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curr18_input VCORE phase 5 output current.
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curr19_label "iout1.6"
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curr19_input VCORE phase 6 output current.
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curr20_label "iout1.7"
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curr20_input VCORE phase 7 output current.
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curr21_label "iout3"
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curr21_input VSA output current.
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curr21_highest Historical maximum VSA output current.
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curr21_reset_history Write any value to reset curr21_highest.
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curr21_crit Critical output current.
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curr21_crit_alarm Output current critical alarm.
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curr21_max Maximum output current.
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curr21_max_alarm Output current high alarm.
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power1_label "pin1"
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power1_input Input power, derived from duty cycle and output current.
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power1_alarm Input power alarm.
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power2_label "pin2"
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power2_input Input power, derived from input current sensor.
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power3_label "pout"
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power3_input Output power.
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temp1_input VCORE temperature.
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temp1_crit Critical high temperature.
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temp1_crit_alarm Chip temperature critical high alarm.
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temp1_max Maximum temperature.
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temp1_max_alarm Chip temperature high alarm.
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temp2_input TSENSE_0 temperature
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temp3_input TSENSE_1 temperature
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temp4_input TSENSE_2 temperature
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temp5_input TSENSE_3 temperature
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temp6_input VSA temperature.
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temp6_crit Critical high temperature.
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temp6_crit_alarm Chip temperature critical high alarm.
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temp6_max Maximum temperature.
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temp6_max_alarm Chip temperature high alarm.
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======================= =======================================================
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