mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-27 06:34:11 +08:00
c5607d8e7a
Implement set_sysclk() and then rather than assuming 256fs use the supplied value to calculate and configure the clock ratio for the currently used sample rate. As a side effect we also end up implementing clock selection for the ADC path. In order to avoid confusion remove the existing set_clkdiv() based configuration of the clock source for the DAC and update the SMDK64xx driver (which is the only in-tree user of the CODEC). Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
36 lines
811 B
C
36 lines
811 B
C
/*
|
|
* wm8580.h -- audio driver for WM8580
|
|
*
|
|
* Copyright 2008 Samsung Electronics.
|
|
* Author: Ryu Euiyoul
|
|
* ryu.real@gmail.com
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
* Free Software Foundation; either version 2 of the License, or (at your
|
|
* option) any later version.
|
|
*
|
|
*/
|
|
|
|
#ifndef _WM8580_H
|
|
#define _WM8580_H
|
|
|
|
#define WM8580_PLLA 1
|
|
#define WM8580_PLLB 2
|
|
|
|
#define WM8580_MCLK 1
|
|
#define WM8580_CLKOUTSRC 2
|
|
|
|
#define WM8580_CLKSRC_MCLK 1
|
|
#define WM8580_CLKSRC_PLLA 2
|
|
#define WM8580_CLKSRC_PLLB 3
|
|
#define WM8580_CLKSRC_OSC 4
|
|
#define WM8580_CLKSRC_NONE 5
|
|
#define WM8580_CLKSRC_ADCMCLK 6
|
|
|
|
#define WM8580_DAI_PAIFRX 0
|
|
#define WM8580_DAI_PAIFTX 1
|
|
|
|
#endif
|
|
|