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f8d1dcaf88
82598/82599 can support EITR == 0, which allows for the absolutely lowest latency setting in the hardware. This disables writeback batching and anything else that relies upon a delayed interrupt. This patch enables the feature of "override" when a user sets rx-usecs to zero, the driver will respect that setting over using RSC, and automatically disable RSC. If rx-usecs is used to set the EITR value to 0, then the driver should disable LRO (aka RSC) internally until EITR is set to non-zero again. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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| .. | ||
| ixgbe_82598.c | ||
| ixgbe_82599.c | ||
| ixgbe_common.c | ||
| ixgbe_common.h | ||
| ixgbe_dcb_82598.c | ||
| ixgbe_dcb_82598.h | ||
| ixgbe_dcb_82599.c | ||
| ixgbe_dcb_82599.h | ||
| ixgbe_dcb_nl.c | ||
| ixgbe_dcb.c | ||
| ixgbe_dcb.h | ||
| ixgbe_ethtool.c | ||
| ixgbe_fcoe.c | ||
| ixgbe_fcoe.h | ||
| ixgbe_main.c | ||
| ixgbe_mbx.c | ||
| ixgbe_mbx.h | ||
| ixgbe_phy.c | ||
| ixgbe_phy.h | ||
| ixgbe_sriov.c | ||
| ixgbe_sriov.h | ||
| ixgbe_type.h | ||
| ixgbe.h | ||
| Makefile | ||