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The CS4271 requires its LRCLK and MCLK to be stable before its RESET line is de-asserted. That also means that clocks cannot be changed without putting the chip back into hardware reset, which also requires a complete re-initialization of all registers. One (undocumented) workaround is to assert and de-assert the PDN bit in the MODE2 register. This patch adds a new flag to both the DT bindings as well as to the platform data to enable that workaround. Signed-off-by: Daniel Mack <zonque@gmail.com> Acked-by: Alexander Sverdlin <subaparts@yandex.ru> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
51 lines
1.3 KiB
Plaintext
51 lines
1.3 KiB
Plaintext
Cirrus Logic CS4271 DT bindings
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This driver supports both the I2C and the SPI bus.
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Required properties:
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- compatible: "cirrus,cs4271"
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For required properties on SPI, please consult
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Documentation/devicetree/bindings/spi/spi-bus.txt
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Required properties on I2C:
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- reg: the i2c address
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Optional properties:
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- reset-gpio: a GPIO spec to define which pin is connected to the chip's
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!RESET pin
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- cirrus,amuteb-eq-bmutec: When given, the Codec's AMUTEB=BMUTEC flag
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is enabled.
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- cirrus,enable-soft-reset:
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The CS4271 requires its LRCLK and MCLK to be stable before its RESET
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line is de-asserted. That also means that clocks cannot be changed
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without putting the chip back into hardware reset, which also requires
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a complete re-initialization of all registers.
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One (undocumented) workaround is to assert and de-assert the PDN bit
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in the MODE2 register. This workaround can be enabled with this DT
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property.
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Note that this is not needed in case the clocks are stable
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throughout the entire runtime of the codec.
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Examples:
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codec_i2c: cs4271@10 {
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compatible = "cirrus,cs4271";
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reg = <0x10>;
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reset-gpio = <&gpio 23 0>;
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};
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codec_spi: cs4271@0 {
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compatible = "cirrus,cs4271";
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reg = <0x0>;
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reset-gpio = <&gpio 23 0>;
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spi-max-frequency = <6000000>;
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};
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