mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-28 07:04:00 +08:00
684f741446
The module is a bridge between the RTC clock domain and the CPU interface clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through this module. Signed-off-by: Zhiwu Song <zhiwu.song@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Reviewed-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
19 lines
472 B
C
19 lines
472 B
C
/*
|
|
* RTC I/O Bridge interfaces for CSR SiRFprimaII
|
|
* ARM access the registers of SYSRTC, GPSRTC and PWRC through this module
|
|
*
|
|
* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
|
|
*
|
|
* Licensed under GPLv2 or later.
|
|
*/
|
|
#ifndef _SIRFSOC_RTC_IOBRG_H_
|
|
#define _SIRFSOC_RTC_IOBRG_H_
|
|
|
|
extern void sirfsoc_rtc_iobrg_besyncing(void);
|
|
|
|
extern u32 sirfsoc_rtc_iobrg_readl(u32 addr);
|
|
|
|
extern void sirfsoc_rtc_iobrg_writel(u32 val, u32 addr);
|
|
|
|
#endif
|