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f64691b3ab
The davinci timer code currently hardcodes the timer register base addresses, the timer irq numbers, and the timers to use for clock events and clocksource. This won't work for some a new SoC so put those values into the soc_info structure and set them up in the SoC-specific files. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
35 lines
903 B
C
35 lines
903 B
C
/*
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* Local header file for DaVinci time code.
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*
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* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
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*
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* 2007 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifndef __ARCH_ARM_MACH_DAVINCI_TIME_H
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#define __ARCH_ARM_MACH_DAVINCI_TIME_H
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#define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400)
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#define DAVINCI_TIMER1_BASE (IO_PHYS + 0x21800)
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enum {
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T0_BOT,
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T0_TOP,
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T1_BOT,
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T1_TOP,
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NUM_TIMERS
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};
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#define IS_TIMER1(id) (id & 0x2)
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#define IS_TIMER0(id) (!IS_TIMER1(id))
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#define IS_TIMER_TOP(id) ((id & 0x1))
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#define IS_TIMER_BOT(id) (!IS_TIMER_TOP(id))
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#define ID_TO_TIMER(id) (IS_TIMER1(id) != 0)
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extern struct davinci_timer_instance davinci_timer_instance[];
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#endif /* __ARCH_ARM_MACH_DAVINCI_TIME_H */
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