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d3f138106b
Change the CONFIG_DMAR to CONFIG_INTEL_IOMMU to be consistent with the other IOMMU options. Rename the CONFIG_INTR_REMAP to CONFIG_IRQ_REMAP to match the irq subsystem name. And define the CONFIG_DMAR_TABLE for the common ACPI DMAR routines shared by both CONFIG_INTEL_IOMMU and CONFIG_IRQ_REMAP. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: yinghai@kernel.org Cc: youquan.song@intel.com Cc: joerg.roedel@amd.com Cc: tony.luck@intel.com Cc: dwmw2@infradead.org Link: http://lkml.kernel.org/r/20110824001456.558630224@sbsiddha-desk.sc.intel.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
46 lines
1.2 KiB
C
46 lines
1.2 KiB
C
#ifndef _ASM_X86_IRQ_REMAPPING_H
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#define _ASM_X86_IRQ_REMAPPING_H
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#define IRTE_DEST(dest) ((x2apic_mode) ? dest : dest << 8)
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#ifdef CONFIG_IRQ_REMAP
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static void irq_remap_modify_chip_defaults(struct irq_chip *chip);
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static inline void prepare_irte(struct irte *irte, int vector,
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unsigned int dest)
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{
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memset(irte, 0, sizeof(*irte));
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irte->present = 1;
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irte->dst_mode = apic->irq_dest_mode;
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/*
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* Trigger mode in the IRTE will always be edge, and for IO-APIC, the
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* actual level or edge trigger will be setup in the IO-APIC
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* RTE. This will help simplify level triggered irq migration.
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* For more details, see the comments (in io_apic.c) explainig IO-APIC
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* irq migration in the presence of interrupt-remapping.
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*/
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irte->trigger_mode = 0;
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irte->dlvry_mode = apic->irq_delivery_mode;
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irte->vector = vector;
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irte->dest_id = IRTE_DEST(dest);
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irte->redir_hint = 1;
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}
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static inline bool irq_remapped(struct irq_cfg *cfg)
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{
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return cfg->irq_2_iommu.iommu != NULL;
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}
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#else
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static void prepare_irte(struct irte *irte, int vector, unsigned int dest)
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{
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}
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static inline bool irq_remapped(struct irq_cfg *cfg)
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{
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return false;
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}
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static inline void irq_remap_modify_chip_defaults(struct irq_chip *chip)
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{
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}
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#endif
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#endif /* _ASM_X86_IRQ_REMAPPING_H */
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