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linux-next/drivers/gpu/drm/msm/dsi
Jessica Zhang 409af447c2 drm/msm/dsi: fix wrong type in msm_dsi_host
Change byte_clk_rate, pixel_clk_rate, esc_clk_rate, and src_clk_rate
from u32 to unsigned long, since clk_get_rate() returns an unsigned long.

Fixes: a6bcddbc2e ("drm/msm: dsi: Handle dual-channel for 6G as well")
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Jessica Zhang <jesszhan@codeaurora.org>
Link: https://lore.kernel.org/r/20211020183438.32263-1-jesszhan@codeaurora.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
2021-10-21 13:41:10 -07:00
..
phy drm/msm/dsi: Add phy configuration for MSM8953 2021-10-15 13:26:34 -07:00
dsi_cfg.c drm/msm/dsi: Fix DSI and DSI PHY regulator config from SDM660 2021-08-07 11:48:40 -07:00
dsi_cfg.h drm/msm/dsi: rename dual DSI to bonded DSI 2021-08-07 11:48:39 -07:00
dsi_host.c drm/msm/dsi: fix wrong type in msm_dsi_host 2021-10-21 13:41:10 -07:00
dsi_manager.c drm/msm/dsi: do not enable irq handler before powering up the host 2021-10-15 13:26:34 -07:00
dsi_phy_5nm.xml.h drm/msm: Generated register update 2021-06-23 07:33:54 -07:00
dsi_phy_7nm.xml.h drm/msm: Generated register update 2021-06-23 07:33:54 -07:00
dsi_phy_10nm.xml.h drm/msm: Generated register update 2021-06-23 07:33:54 -07:00
dsi_phy_14nm.xml.h drm/msm: Generated register update 2021-06-23 07:33:54 -07:00
dsi_phy_20nm.xml.h drm/msm: Generated register update 2021-06-23 07:33:54 -07:00
dsi_phy_28nm_8960.xml.h drm/msm: Generated register update 2021-06-23 07:33:54 -07:00
dsi_phy_28nm.xml.h drm/msm: Generated register update 2021-06-23 07:33:54 -07:00
dsi.c drm/msm/dsi: Fix an error code in msm_dsi_modeset_init() 2021-10-11 17:30:53 -07:00
dsi.h drm/msm/dsi: do not enable irq handler before powering up the host 2021-10-15 13:26:34 -07:00
dsi.xml.h drm/msm/dsi: add continuous clock support for 7nm PHY 2021-08-10 15:30:32 -07:00
mmss_cc.xml.h drm/msm: Generated register update 2021-06-23 07:33:54 -07:00
sfpb.xml.h drm/msm: Generated register update 2021-06-23 07:33:54 -07:00