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https://github.com/edk2-porting/linux-next.git
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e5c86679d5
Linux IRQ #0 is reserved for error reporting and may not be used. Increase NR_IRQS for one additional slot and increase irq_domain_add_legacy parameter first_irq value to 1, so that linux IRQ #0 is not associated with hardware IRQ #0 in legacy IRQ domains. Introduce macro XTENSA_PIC_LINUX_IRQ for static translation of xtensa PIC hardware IRQ # to linux IRQ #. Use this macro in XTFPGA platform data definitions. This fixes inability to use hardware IRQ #0 in configurations that don't use device tree and allows for non-identity mapping between linux IRQ # and hardware IRQ #. Cc: stable@vger.kernel.org Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
108 lines
2.7 KiB
C
108 lines
2.7 KiB
C
/*
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* Xtensa built-in interrupt controller
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*
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* Copyright (C) 2002 - 2013 Tensilica, Inc.
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* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Chris Zankel <chris@zankel.net>
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* Kevin Chea
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*/
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#include <linux/interrupt.h>
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#include <linux/irqdomain.h>
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/of.h>
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unsigned int cached_irq_mask;
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/*
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* Device Tree IRQ specifier translation function which works with one or
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* two cell bindings. First cell value maps directly to the hwirq number.
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* Second cell if present specifies whether hwirq number is external (1) or
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* internal (0).
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*/
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static int xtensa_pic_irq_domain_xlate(struct irq_domain *d,
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struct device_node *ctrlr,
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const u32 *intspec, unsigned int intsize,
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unsigned long *out_hwirq, unsigned int *out_type)
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{
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return xtensa_irq_domain_xlate(intspec, intsize,
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intspec[0], intspec[0],
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out_hwirq, out_type);
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}
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static const struct irq_domain_ops xtensa_irq_domain_ops = {
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.xlate = xtensa_pic_irq_domain_xlate,
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.map = xtensa_irq_map,
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};
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static void xtensa_irq_mask(struct irq_data *d)
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{
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cached_irq_mask &= ~(1 << d->hwirq);
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set_sr(cached_irq_mask, intenable);
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}
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static void xtensa_irq_unmask(struct irq_data *d)
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{
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cached_irq_mask |= 1 << d->hwirq;
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set_sr(cached_irq_mask, intenable);
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}
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static void xtensa_irq_enable(struct irq_data *d)
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{
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variant_irq_enable(d->hwirq);
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xtensa_irq_unmask(d);
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}
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static void xtensa_irq_disable(struct irq_data *d)
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{
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xtensa_irq_mask(d);
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variant_irq_disable(d->hwirq);
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}
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static void xtensa_irq_ack(struct irq_data *d)
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{
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set_sr(1 << d->hwirq, intclear);
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}
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static int xtensa_irq_retrigger(struct irq_data *d)
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{
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set_sr(1 << d->hwirq, intset);
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return 1;
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}
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static struct irq_chip xtensa_irq_chip = {
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.name = "xtensa",
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.irq_enable = xtensa_irq_enable,
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.irq_disable = xtensa_irq_disable,
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.irq_mask = xtensa_irq_mask,
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.irq_unmask = xtensa_irq_unmask,
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.irq_ack = xtensa_irq_ack,
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.irq_retrigger = xtensa_irq_retrigger,
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};
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int __init xtensa_pic_init_legacy(struct device_node *interrupt_parent)
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{
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struct irq_domain *root_domain =
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irq_domain_add_legacy(NULL, NR_IRQS - 1, 1, 0,
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&xtensa_irq_domain_ops, &xtensa_irq_chip);
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irq_set_default_host(root_domain);
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return 0;
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}
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static int __init xtensa_pic_init(struct device_node *np,
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struct device_node *interrupt_parent)
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{
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struct irq_domain *root_domain =
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irq_domain_add_linear(np, NR_IRQS, &xtensa_irq_domain_ops,
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&xtensa_irq_chip);
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irq_set_default_host(root_domain);
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return 0;
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}
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IRQCHIP_DECLARE(xtensa_irq_chip, "cdns,xtensa-pic", xtensa_pic_init);
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