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d6a4f70909
On PowerNV platforms, when a CPU is offline, we put it into nap mode. It's possible that the CPU wakes up from nap mode while it is still offline due to a stray IPI. A misdirected device interrupt could also potentially cause it to wake up. In that circumstance, we need to clear the interrupt so that the CPU can go back to nap mode. In the past the clearing of the interrupt was accomplished by briefly enabling interrupts and allowing the normal interrupt handling code (do_IRQ() etc.) to handle the interrupt. This has the problem that this code calls irq_enter() and irq_exit(), which call functions such as account_system_vtime() which use RCU internally. Use of RCU is not permitted on offline CPUs and will trigger errors if RCU checking is enabled. To avoid calling into any generic code which might use RCU, we adopt a different method of clearing interrupts on offline CPUs. Since we are on the PowerNV platform, we know that the system interrupt controller is a XICS being driven directly (i.e. not via hcalls) by the kernel. Hence this adds a new icp_native_flush_interrupt() function to the native-mode XICS driver and arranges to call that when an offline CPU is woken from nap. This new function reads the interrupt from the XICS. If it is an IPI, it clears the IPI; if it is a device interrupt, it prints a warning and disables the source. Then it does the end-of-interrupt processing for the interrupt. The other thing that briefly enabling interrupts did was to check and clear the irq_happened flag in this CPU's PACA. Therefore, after flushing the interrupt from the XICS, we also clear all bits except the PACA_IRQ_HARD_DIS (interrupts are hard disabled) bit from the irq_happened flag. The PACA_IRQ_HARD_DIS flag is set by power7_nap() and is left set to indicate that interrupts are hard disabled. This means we then have to ignore that flag in power7_nap(), which is reasonable since it doesn't indicate that any interrupt event needs servicing. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
343 lines
7.6 KiB
C
343 lines
7.6 KiB
C
/*
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* Copyright 2011 IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/irq.h>
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#include <linux/smp.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/cpu.h>
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#include <linux/of.h>
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#include <linux/spinlock.h>
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#include <linux/module.h>
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#include <asm/prom.h>
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#include <asm/io.h>
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#include <asm/smp.h>
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#include <asm/irq.h>
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#include <asm/errno.h>
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#include <asm/xics.h>
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#include <asm/kvm_ppc.h>
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#include <asm/dbell.h>
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struct icp_ipl {
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union {
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u32 word;
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u8 bytes[4];
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} xirr_poll;
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union {
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u32 word;
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u8 bytes[4];
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} xirr;
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u32 dummy;
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union {
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u32 word;
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u8 bytes[4];
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} qirr;
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u32 link_a;
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u32 link_b;
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u32 link_c;
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};
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static struct icp_ipl __iomem *icp_native_regs[NR_CPUS];
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static inline unsigned int icp_native_get_xirr(void)
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{
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int cpu = smp_processor_id();
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unsigned int xirr;
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/* Handled an interrupt latched by KVM */
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xirr = kvmppc_get_xics_latch();
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if (xirr)
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return xirr;
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return in_be32(&icp_native_regs[cpu]->xirr.word);
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}
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static inline void icp_native_set_xirr(unsigned int value)
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{
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int cpu = smp_processor_id();
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out_be32(&icp_native_regs[cpu]->xirr.word, value);
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}
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static inline void icp_native_set_cppr(u8 value)
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{
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int cpu = smp_processor_id();
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out_8(&icp_native_regs[cpu]->xirr.bytes[0], value);
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}
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static inline void icp_native_set_qirr(int n_cpu, u8 value)
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{
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out_8(&icp_native_regs[n_cpu]->qirr.bytes[0], value);
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}
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static void icp_native_set_cpu_priority(unsigned char cppr)
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{
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xics_set_base_cppr(cppr);
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icp_native_set_cppr(cppr);
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iosync();
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}
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void icp_native_eoi(struct irq_data *d)
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{
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unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
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iosync();
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icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq);
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}
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static void icp_native_teardown_cpu(void)
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{
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int cpu = smp_processor_id();
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/* Clear any pending IPI */
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icp_native_set_qirr(cpu, 0xff);
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}
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static void icp_native_flush_ipi(void)
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{
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/* We take the ipi irq but and never return so we
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* need to EOI the IPI, but want to leave our priority 0
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*
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* should we check all the other interrupts too?
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* should we be flagging idle loop instead?
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* or creating some task to be scheduled?
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*/
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icp_native_set_xirr((0x00 << 24) | XICS_IPI);
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}
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static unsigned int icp_native_get_irq(void)
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{
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unsigned int xirr = icp_native_get_xirr();
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unsigned int vec = xirr & 0x00ffffff;
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unsigned int irq;
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if (vec == XICS_IRQ_SPURIOUS)
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return NO_IRQ;
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irq = irq_find_mapping(xics_host, vec);
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if (likely(irq != NO_IRQ)) {
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xics_push_cppr(vec);
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return irq;
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}
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/* We don't have a linux mapping, so have rtas mask it. */
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xics_mask_unknown_vec(vec);
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/* We might learn about it later, so EOI it */
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icp_native_set_xirr(xirr);
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return NO_IRQ;
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}
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#ifdef CONFIG_SMP
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static void icp_native_cause_ipi(int cpu, unsigned long data)
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{
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kvmppc_set_host_ipi(cpu, 1);
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#ifdef CONFIG_PPC_DOORBELL
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if (cpu_has_feature(CPU_FTR_DBELL) &&
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(cpumask_test_cpu(cpu, cpu_sibling_mask(smp_processor_id()))))
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doorbell_cause_ipi(cpu, data);
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else
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#endif
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icp_native_set_qirr(cpu, IPI_PRIORITY);
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}
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/*
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* Called when an interrupt is received on an off-line CPU to
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* clear the interrupt, so that the CPU can go back to nap mode.
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*/
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void icp_native_flush_interrupt(void)
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{
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unsigned int xirr = icp_native_get_xirr();
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unsigned int vec = xirr & 0x00ffffff;
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if (vec == XICS_IRQ_SPURIOUS)
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return;
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if (vec == XICS_IPI) {
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/* Clear pending IPI */
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int cpu = smp_processor_id();
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kvmppc_set_host_ipi(cpu, 0);
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icp_native_set_qirr(cpu, 0xff);
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} else {
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pr_err("XICS: hw interrupt 0x%x to offline cpu, disabling\n",
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vec);
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xics_mask_unknown_vec(vec);
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}
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/* EOI the interrupt */
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icp_native_set_xirr(xirr);
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}
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void xics_wake_cpu(int cpu)
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{
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icp_native_set_qirr(cpu, IPI_PRIORITY);
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}
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EXPORT_SYMBOL_GPL(xics_wake_cpu);
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static irqreturn_t icp_native_ipi_action(int irq, void *dev_id)
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{
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int cpu = smp_processor_id();
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kvmppc_set_host_ipi(cpu, 0);
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icp_native_set_qirr(cpu, 0xff);
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return smp_ipi_demux();
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}
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#endif /* CONFIG_SMP */
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static int __init icp_native_map_one_cpu(int hw_id, unsigned long addr,
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unsigned long size)
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{
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char *rname;
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int i, cpu = -1;
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/* This may look gross but it's good enough for now, we don't quite
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* have a hard -> linux processor id matching.
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*/
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for_each_possible_cpu(i) {
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if (!cpu_present(i))
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continue;
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if (hw_id == get_hard_smp_processor_id(i)) {
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cpu = i;
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break;
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}
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}
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/* Fail, skip that CPU. Don't print, it's normal, some XICS come up
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* with way more entries in there than you have CPUs
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*/
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if (cpu == -1)
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return 0;
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rname = kasprintf(GFP_KERNEL, "CPU %d [0x%x] Interrupt Presentation",
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cpu, hw_id);
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if (!request_mem_region(addr, size, rname)) {
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pr_warning("icp_native: Could not reserve ICP MMIO"
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" for CPU %d, interrupt server #0x%x\n",
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cpu, hw_id);
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return -EBUSY;
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}
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icp_native_regs[cpu] = ioremap(addr, size);
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kvmppc_set_xics_phys(cpu, addr);
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if (!icp_native_regs[cpu]) {
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pr_warning("icp_native: Failed ioremap for CPU %d, "
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"interrupt server #0x%x, addr %#lx\n",
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cpu, hw_id, addr);
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release_mem_region(addr, size);
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return -ENOMEM;
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}
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return 0;
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}
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static int __init icp_native_init_one_node(struct device_node *np,
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unsigned int *indx)
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{
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unsigned int ilen;
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const __be32 *ireg;
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int i;
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int reg_tuple_size;
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int num_servers = 0;
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/* This code does the theorically broken assumption that the interrupt
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* server numbers are the same as the hard CPU numbers.
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* This happens to be the case so far but we are playing with fire...
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* should be fixed one of these days. -BenH.
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*/
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ireg = of_get_property(np, "ibm,interrupt-server-ranges", &ilen);
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/* Do that ever happen ? we'll know soon enough... but even good'old
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* f80 does have that property ..
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*/
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WARN_ON((ireg == NULL) || (ilen != 2*sizeof(u32)));
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if (ireg) {
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*indx = of_read_number(ireg, 1);
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if (ilen >= 2*sizeof(u32))
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num_servers = of_read_number(ireg + 1, 1);
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}
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ireg = of_get_property(np, "reg", &ilen);
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if (!ireg) {
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pr_err("icp_native: Can't find interrupt reg property");
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return -1;
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}
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reg_tuple_size = (of_n_addr_cells(np) + of_n_size_cells(np)) * 4;
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if (((ilen % reg_tuple_size) != 0)
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|| (num_servers && (num_servers != (ilen / reg_tuple_size)))) {
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pr_err("icp_native: ICP reg len (%d) != num servers (%d)",
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ilen / reg_tuple_size, num_servers);
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return -1;
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}
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for (i = 0; i < (ilen / reg_tuple_size); i++) {
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struct resource r;
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int err;
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err = of_address_to_resource(np, i, &r);
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if (err) {
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pr_err("icp_native: Could not translate ICP MMIO"
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" for interrupt server 0x%x (%d)\n", *indx, err);
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return -1;
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}
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if (icp_native_map_one_cpu(*indx, r.start, resource_size(&r)))
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return -1;
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(*indx)++;
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}
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return 0;
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}
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static const struct icp_ops icp_native_ops = {
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.get_irq = icp_native_get_irq,
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.eoi = icp_native_eoi,
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.set_priority = icp_native_set_cpu_priority,
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.teardown_cpu = icp_native_teardown_cpu,
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.flush_ipi = icp_native_flush_ipi,
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#ifdef CONFIG_SMP
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.ipi_action = icp_native_ipi_action,
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.cause_ipi = icp_native_cause_ipi,
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#endif
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};
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int __init icp_native_init(void)
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{
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struct device_node *np;
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u32 indx = 0;
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int found = 0;
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for_each_compatible_node(np, NULL, "ibm,ppc-xicp")
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if (icp_native_init_one_node(np, &indx) == 0)
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found = 1;
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if (!found) {
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for_each_node_by_type(np,
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"PowerPC-External-Interrupt-Presentation") {
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if (icp_native_init_one_node(np, &indx) == 0)
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found = 1;
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}
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}
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if (found == 0)
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return -ENODEV;
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icp_ops = &icp_native_ops;
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return 0;
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}
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