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e15d1c12c5
Refactor and clean up the tw68 driver. It's now using the proper V4L2 core frameworks. Tested with my Techwell tw6805a and tw6816 grabber boards. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
196 lines
5.6 KiB
C
196 lines
5.6 KiB
C
/*
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* tw68-reg.h - TW68xx register offsets
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*
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* Much of this code is derived from the cx88 and sa7134 drivers, which
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* were in turn derived from the bt87x driver. The original work was by
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* Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
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* Hans Verkuil, Andy Walls and many others. Their work is gratefully
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* acknowledged. Full credit goes to them - any problems within this code
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* are mine.
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*
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* Copyright (C) William M. Brack
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*
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* Refactored and updated to the latest v4l core frameworks:
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*
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* Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _TW68_REG_H_
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#define _TW68_REG_H_
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/* ---------------------------------------------------------------------- */
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#define TW68_DMAC 0x000
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#define TW68_DMAP_SA 0x004
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#define TW68_DMAP_EXE 0x008
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#define TW68_DMAP_PP 0x00c
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#define TW68_VBIC 0x010
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#define TW68_SBUSC 0x014
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#define TW68_SBUSSD 0x018
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#define TW68_INTSTAT 0x01C
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#define TW68_INTMASK 0x020
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#define TW68_GPIOC 0x024
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#define TW68_GPOE 0x028
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#define TW68_TESTREG 0x02C
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#define TW68_SBUSRD 0x030
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#define TW68_SBUS_TRIG 0x034
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#define TW68_CAP_CTL 0x040
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#define TW68_SUBSYS 0x054
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#define TW68_I2C_RST 0x064
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#define TW68_VBIINST 0x06C
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/* define bits in FIFO and DMAP Control reg */
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#define TW68_DMAP_EN (1 << 0)
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#define TW68_FIFO_EN (1 << 1)
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/* define the Interrupt Status Register bits */
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#define TW68_SBDONE (1 << 0)
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#define TW68_DMAPI (1 << 1)
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#define TW68_GPINT (1 << 2)
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#define TW68_FFOF (1 << 3)
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#define TW68_FDMIS (1 << 4)
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#define TW68_DMAPERR (1 << 5)
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#define TW68_PABORT (1 << 6)
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#define TW68_SBDONE2 (1 << 12)
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#define TW68_SBERR2 (1 << 13)
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#define TW68_PPERR (1 << 14)
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#define TW68_FFERR (1 << 15)
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#define TW68_DET50 (1 << 16)
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#define TW68_FLOCK (1 << 17)
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#define TW68_CCVALID (1 << 18)
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#define TW68_VLOCK (1 << 19)
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#define TW68_FIELD (1 << 20)
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#define TW68_SLOCK (1 << 21)
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#define TW68_HLOCK (1 << 22)
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#define TW68_VDLOSS (1 << 23)
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#define TW68_SBERR (1 << 24)
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/* define the i2c control register bits */
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#define TW68_SBMODE (0)
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#define TW68_WREN (1)
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#define TW68_SSCLK (6)
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#define TW68_SSDAT (7)
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#define TW68_SBCLK (8)
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#define TW68_WDLEN (16)
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#define TW68_RDLEN (20)
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#define TW68_SBRW (24)
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#define TW68_SBDEV (25)
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#define TW68_SBMODE_B (1 << TW68_SBMODE)
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#define TW68_WREN_B (1 << TW68_WREN)
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#define TW68_SSCLK_B (1 << TW68_SSCLK)
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#define TW68_SSDAT_B (1 << TW68_SSDAT)
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#define TW68_SBRW_B (1 << TW68_SBRW)
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#define TW68_GPDATA 0x100
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#define TW68_STATUS1 0x204
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#define TW68_INFORM 0x208
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#define TW68_OPFORM 0x20C
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#define TW68_HSYNC 0x210
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#define TW68_ACNTL 0x218
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#define TW68_CROP_HI 0x21C
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#define TW68_VDELAY_LO 0x220
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#define TW68_VACTIVE_LO 0x224
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#define TW68_HDELAY_LO 0x228
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#define TW68_HACTIVE_LO 0x22C
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#define TW68_CNTRL1 0x230
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#define TW68_VSCALE_LO 0x234
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#define TW68_SCALE_HI 0x238
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#define TW68_HSCALE_LO 0x23C
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#define TW68_BRIGHT 0x240
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#define TW68_CONTRAST 0x244
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#define TW68_SHARPNESS 0x248
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#define TW68_SAT_U 0x24C
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#define TW68_SAT_V 0x250
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#define TW68_HUE 0x254
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#define TW68_SHARP2 0x258
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#define TW68_VSHARP 0x25C
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#define TW68_CORING 0x260
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#define TW68_VBICNTL 0x264
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#define TW68_CNTRL2 0x268
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#define TW68_CC_DATA 0x26C
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#define TW68_SDT 0x270
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#define TW68_SDTR 0x274
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#define TW68_RESERV2 0x278
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#define TW68_RESERV3 0x27C
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#define TW68_CLMPG 0x280
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#define TW68_IAGC 0x284
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#define TW68_AGCGAIN 0x288
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#define TW68_PEAKWT 0x28C
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#define TW68_CLMPL 0x290
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#define TW68_SYNCT 0x294
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#define TW68_MISSCNT 0x298
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#define TW68_PCLAMP 0x29C
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#define TW68_VCNTL1 0x2A0
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#define TW68_VCNTL2 0x2A4
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#define TW68_CKILL 0x2A8
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#define TW68_COMB 0x2AC
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#define TW68_LDLY 0x2B0
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#define TW68_MISC1 0x2B4
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#define TW68_LOOP 0x2B8
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#define TW68_MISC2 0x2BC
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#define TW68_MVSN 0x2C0
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#define TW68_STATUS2 0x2C4
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#define TW68_HFREF 0x2C8
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#define TW68_CLMD 0x2CC
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#define TW68_IDCNTL 0x2D0
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#define TW68_CLCNTL1 0x2D4
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/* Audio */
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#define TW68_ACKI1 0x300
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#define TW68_ACKI2 0x304
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#define TW68_ACKI3 0x308
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#define TW68_ACKN1 0x30C
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#define TW68_ACKN2 0x310
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#define TW68_ACKN3 0x314
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#define TW68_SDIV 0x318
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#define TW68_LRDIV 0x31C
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#define TW68_ACCNTL 0x320
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#define TW68_VSCTL 0x3B8
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#define TW68_CHROMAGVAL 0x3BC
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#define TW68_F2CROP_HI 0x3DC
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#define TW68_F2VDELAY_LO 0x3E0
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#define TW68_F2VACTIVE_LO 0x3E4
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#define TW68_F2HDELAY_LO 0x3E8
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#define TW68_F2HACTIVE_LO 0x3EC
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#define TW68_F2CNT 0x3F0
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#define TW68_F2VSCALE_LO 0x3F4
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#define TW68_F2SCALE_HI 0x3F8
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#define TW68_F2HSCALE_LO 0x3FC
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#define RISC_INT_BIT 0x08000000
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#define RISC_SYNCO 0xC0000000
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#define RISC_SYNCE 0xD0000000
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#define RISC_JUMP 0xB0000000
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#define RISC_LINESTART 0x90000000
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#define RISC_INLINE 0xA0000000
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#define VideoFormatNTSC 0
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#define VideoFormatNTSCJapan 0
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#define VideoFormatPALBDGHI 1
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#define VideoFormatSECAM 2
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#define VideoFormatNTSC443 3
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#define VideoFormatPALM 4
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#define VideoFormatPALN 5
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#define VideoFormatPALNC 5
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#define VideoFormatPAL60 6
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#define VideoFormatAuto 7
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#define ColorFormatRGB32 0x00
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#define ColorFormatRGB24 0x10
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#define ColorFormatRGB16 0x20
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#define ColorFormatRGB15 0x30
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#define ColorFormatYUY2 0x40
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#define ColorFormatBSWAP 0x04
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#define ColorFormatWSWAP 0x08
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#define ColorFormatGamma 0x80
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#endif
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