mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-25 13:43:55 +08:00
a2e27787f8
These new PCI services allow to probe for 2.3-compliant INTx masking support and then use the feature from PCI interrupt handlers. The services are properly synchronized with concurrent config space access via sysfs or on device reset. This enables generic PCI device drivers like uio_pci_generic or KVM's device assignment to implement the necessary kernel-side IRQ handling without any knowledge about device-specific interrupt status and control registers. Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
470 lines
11 KiB
C
470 lines
11 KiB
C
#include <linux/delay.h>
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#include <linux/pci.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include <linux/ioport.h>
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#include <linux/wait.h>
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#include "pci.h"
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/*
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* This interrupt-safe spinlock protects all accesses to PCI
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* configuration space.
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*/
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DEFINE_RAW_SPINLOCK(pci_lock);
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/*
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* Wrappers for all PCI configuration access functions. They just check
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* alignment, do locking and call the low-level functions pointed to
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* by pci_dev->ops.
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*/
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#define PCI_byte_BAD 0
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#define PCI_word_BAD (pos & 1)
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#define PCI_dword_BAD (pos & 3)
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#define PCI_OP_READ(size,type,len) \
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int pci_bus_read_config_##size \
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(struct pci_bus *bus, unsigned int devfn, int pos, type *value) \
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{ \
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int res; \
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unsigned long flags; \
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u32 data = 0; \
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if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
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raw_spin_lock_irqsave(&pci_lock, flags); \
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res = bus->ops->read(bus, devfn, pos, len, &data); \
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*value = (type)data; \
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raw_spin_unlock_irqrestore(&pci_lock, flags); \
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return res; \
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}
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#define PCI_OP_WRITE(size,type,len) \
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int pci_bus_write_config_##size \
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(struct pci_bus *bus, unsigned int devfn, int pos, type value) \
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{ \
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int res; \
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unsigned long flags; \
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if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
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raw_spin_lock_irqsave(&pci_lock, flags); \
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res = bus->ops->write(bus, devfn, pos, len, value); \
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raw_spin_unlock_irqrestore(&pci_lock, flags); \
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return res; \
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}
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PCI_OP_READ(byte, u8, 1)
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PCI_OP_READ(word, u16, 2)
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PCI_OP_READ(dword, u32, 4)
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PCI_OP_WRITE(byte, u8, 1)
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PCI_OP_WRITE(word, u16, 2)
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PCI_OP_WRITE(dword, u32, 4)
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EXPORT_SYMBOL(pci_bus_read_config_byte);
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EXPORT_SYMBOL(pci_bus_read_config_word);
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EXPORT_SYMBOL(pci_bus_read_config_dword);
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EXPORT_SYMBOL(pci_bus_write_config_byte);
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EXPORT_SYMBOL(pci_bus_write_config_word);
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EXPORT_SYMBOL(pci_bus_write_config_dword);
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/**
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* pci_bus_set_ops - Set raw operations of pci bus
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* @bus: pci bus struct
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* @ops: new raw operations
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*
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* Return previous raw operations
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*/
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struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops)
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{
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struct pci_ops *old_ops;
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unsigned long flags;
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raw_spin_lock_irqsave(&pci_lock, flags);
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old_ops = bus->ops;
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bus->ops = ops;
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raw_spin_unlock_irqrestore(&pci_lock, flags);
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return old_ops;
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}
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EXPORT_SYMBOL(pci_bus_set_ops);
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/**
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* pci_read_vpd - Read one entry from Vital Product Data
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* @dev: pci device struct
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* @pos: offset in vpd space
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* @count: number of bytes to read
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* @buf: pointer to where to store result
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*
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*/
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ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
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{
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if (!dev->vpd || !dev->vpd->ops)
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return -ENODEV;
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return dev->vpd->ops->read(dev, pos, count, buf);
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}
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EXPORT_SYMBOL(pci_read_vpd);
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/**
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* pci_write_vpd - Write entry to Vital Product Data
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* @dev: pci device struct
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* @pos: offset in vpd space
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* @count: number of bytes to write
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* @buf: buffer containing write data
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*
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*/
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ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
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{
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if (!dev->vpd || !dev->vpd->ops)
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return -ENODEV;
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return dev->vpd->ops->write(dev, pos, count, buf);
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}
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EXPORT_SYMBOL(pci_write_vpd);
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/*
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* The following routines are to prevent the user from accessing PCI config
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* space when it's unsafe to do so. Some devices require this during BIST and
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* we're required to prevent it during D-state transitions.
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*
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* We have a bit per device to indicate it's blocked and a global wait queue
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* for callers to sleep on until devices are unblocked.
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*/
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static DECLARE_WAIT_QUEUE_HEAD(pci_cfg_wait);
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static noinline void pci_wait_cfg(struct pci_dev *dev)
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{
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DECLARE_WAITQUEUE(wait, current);
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__add_wait_queue(&pci_cfg_wait, &wait);
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do {
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set_current_state(TASK_UNINTERRUPTIBLE);
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raw_spin_unlock_irq(&pci_lock);
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schedule();
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raw_spin_lock_irq(&pci_lock);
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} while (dev->block_cfg_access);
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__remove_wait_queue(&pci_cfg_wait, &wait);
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}
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/* Returns 0 on success, negative values indicate error. */
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#define PCI_USER_READ_CONFIG(size,type) \
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int pci_user_read_config_##size \
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(struct pci_dev *dev, int pos, type *val) \
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{ \
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int ret = 0; \
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u32 data = -1; \
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if (PCI_##size##_BAD) \
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return -EINVAL; \
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raw_spin_lock_irq(&pci_lock); \
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if (unlikely(dev->block_cfg_access)) \
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pci_wait_cfg(dev); \
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ret = dev->bus->ops->read(dev->bus, dev->devfn, \
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pos, sizeof(type), &data); \
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raw_spin_unlock_irq(&pci_lock); \
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*val = (type)data; \
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if (ret > 0) \
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ret = -EINVAL; \
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return ret; \
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}
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/* Returns 0 on success, negative values indicate error. */
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#define PCI_USER_WRITE_CONFIG(size,type) \
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int pci_user_write_config_##size \
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(struct pci_dev *dev, int pos, type val) \
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{ \
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int ret = -EIO; \
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if (PCI_##size##_BAD) \
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return -EINVAL; \
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raw_spin_lock_irq(&pci_lock); \
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if (unlikely(dev->block_cfg_access)) \
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pci_wait_cfg(dev); \
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ret = dev->bus->ops->write(dev->bus, dev->devfn, \
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pos, sizeof(type), val); \
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raw_spin_unlock_irq(&pci_lock); \
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if (ret > 0) \
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ret = -EINVAL; \
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return ret; \
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}
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PCI_USER_READ_CONFIG(byte, u8)
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PCI_USER_READ_CONFIG(word, u16)
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PCI_USER_READ_CONFIG(dword, u32)
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PCI_USER_WRITE_CONFIG(byte, u8)
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PCI_USER_WRITE_CONFIG(word, u16)
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PCI_USER_WRITE_CONFIG(dword, u32)
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/* VPD access through PCI 2.2+ VPD capability */
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#define PCI_VPD_PCI22_SIZE (PCI_VPD_ADDR_MASK + 1)
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struct pci_vpd_pci22 {
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struct pci_vpd base;
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struct mutex lock;
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u16 flag;
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bool busy;
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u8 cap;
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};
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/*
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* Wait for last operation to complete.
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* This code has to spin since there is no other notification from the PCI
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* hardware. Since the VPD is often implemented by serial attachment to an
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* EEPROM, it may take many milliseconds to complete.
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*
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* Returns 0 on success, negative values indicate error.
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*/
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static int pci_vpd_pci22_wait(struct pci_dev *dev)
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{
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struct pci_vpd_pci22 *vpd =
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container_of(dev->vpd, struct pci_vpd_pci22, base);
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unsigned long timeout = jiffies + HZ/20 + 2;
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u16 status;
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int ret;
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if (!vpd->busy)
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return 0;
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for (;;) {
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ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
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&status);
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if (ret < 0)
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return ret;
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if ((status & PCI_VPD_ADDR_F) == vpd->flag) {
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vpd->busy = false;
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return 0;
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}
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if (time_after(jiffies, timeout)) {
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dev_printk(KERN_DEBUG, &dev->dev,
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"vpd r/w failed. This is likely a firmware "
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"bug on this device. Contact the card "
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"vendor for a firmware update.");
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return -ETIMEDOUT;
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}
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if (fatal_signal_pending(current))
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return -EINTR;
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if (!cond_resched())
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udelay(10);
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}
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}
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static ssize_t pci_vpd_pci22_read(struct pci_dev *dev, loff_t pos, size_t count,
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void *arg)
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{
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struct pci_vpd_pci22 *vpd =
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container_of(dev->vpd, struct pci_vpd_pci22, base);
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int ret;
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loff_t end = pos + count;
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u8 *buf = arg;
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if (pos < 0 || pos > vpd->base.len || end > vpd->base.len)
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return -EINVAL;
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if (mutex_lock_killable(&vpd->lock))
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return -EINTR;
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ret = pci_vpd_pci22_wait(dev);
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if (ret < 0)
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goto out;
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while (pos < end) {
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u32 val;
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unsigned int i, skip;
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ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
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pos & ~3);
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if (ret < 0)
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break;
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vpd->busy = true;
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vpd->flag = PCI_VPD_ADDR_F;
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ret = pci_vpd_pci22_wait(dev);
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if (ret < 0)
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break;
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ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val);
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if (ret < 0)
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break;
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skip = pos & 3;
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for (i = 0; i < sizeof(u32); i++) {
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if (i >= skip) {
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*buf++ = val;
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if (++pos == end)
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break;
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}
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val >>= 8;
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}
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}
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out:
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mutex_unlock(&vpd->lock);
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return ret ? ret : count;
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}
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static ssize_t pci_vpd_pci22_write(struct pci_dev *dev, loff_t pos, size_t count,
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const void *arg)
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{
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struct pci_vpd_pci22 *vpd =
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container_of(dev->vpd, struct pci_vpd_pci22, base);
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const u8 *buf = arg;
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loff_t end = pos + count;
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int ret = 0;
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if (pos < 0 || (pos & 3) || (count & 3) || end > vpd->base.len)
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return -EINVAL;
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if (mutex_lock_killable(&vpd->lock))
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return -EINTR;
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ret = pci_vpd_pci22_wait(dev);
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if (ret < 0)
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goto out;
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while (pos < end) {
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u32 val;
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val = *buf++;
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val |= *buf++ << 8;
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val |= *buf++ << 16;
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val |= *buf++ << 24;
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ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA, val);
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if (ret < 0)
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break;
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ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
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pos | PCI_VPD_ADDR_F);
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if (ret < 0)
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break;
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vpd->busy = true;
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vpd->flag = 0;
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ret = pci_vpd_pci22_wait(dev);
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if (ret < 0)
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break;
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pos += sizeof(u32);
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}
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out:
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mutex_unlock(&vpd->lock);
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return ret ? ret : count;
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}
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static void pci_vpd_pci22_release(struct pci_dev *dev)
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{
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kfree(container_of(dev->vpd, struct pci_vpd_pci22, base));
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}
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static const struct pci_vpd_ops pci_vpd_pci22_ops = {
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.read = pci_vpd_pci22_read,
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.write = pci_vpd_pci22_write,
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.release = pci_vpd_pci22_release,
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};
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int pci_vpd_pci22_init(struct pci_dev *dev)
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{
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struct pci_vpd_pci22 *vpd;
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u8 cap;
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cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
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if (!cap)
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return -ENODEV;
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vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC);
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if (!vpd)
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return -ENOMEM;
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vpd->base.len = PCI_VPD_PCI22_SIZE;
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vpd->base.ops = &pci_vpd_pci22_ops;
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mutex_init(&vpd->lock);
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vpd->cap = cap;
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vpd->busy = false;
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dev->vpd = &vpd->base;
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return 0;
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}
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/**
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* pci_vpd_truncate - Set available Vital Product Data size
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* @dev: pci device struct
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* @size: available memory in bytes
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*
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* Adjust size of available VPD area.
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*/
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int pci_vpd_truncate(struct pci_dev *dev, size_t size)
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{
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if (!dev->vpd)
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return -EINVAL;
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/* limited by the access method */
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if (size > dev->vpd->len)
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return -EINVAL;
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dev->vpd->len = size;
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if (dev->vpd->attr)
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dev->vpd->attr->size = size;
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return 0;
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}
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EXPORT_SYMBOL(pci_vpd_truncate);
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/**
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* pci_cfg_access_lock - Lock PCI config reads/writes
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* @dev: pci device struct
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*
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* When access is locked, any userspace reads or writes to config
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* space and concurrent lock requests will sleep until access is
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* allowed via pci_cfg_access_unlocked again.
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*/
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void pci_cfg_access_lock(struct pci_dev *dev)
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{
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might_sleep();
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raw_spin_lock_irq(&pci_lock);
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if (dev->block_cfg_access)
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pci_wait_cfg(dev);
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dev->block_cfg_access = 1;
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raw_spin_unlock_irq(&pci_lock);
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}
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EXPORT_SYMBOL_GPL(pci_cfg_access_lock);
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/**
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* pci_cfg_access_trylock - try to lock PCI config reads/writes
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* @dev: pci device struct
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*
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* Same as pci_cfg_access_lock, but will return 0 if access is
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* already locked, 1 otherwise. This function can be used from
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* atomic contexts.
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*/
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bool pci_cfg_access_trylock(struct pci_dev *dev)
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{
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unsigned long flags;
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bool locked = true;
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raw_spin_lock_irqsave(&pci_lock, flags);
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if (dev->block_cfg_access)
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locked = false;
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else
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dev->block_cfg_access = 1;
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raw_spin_unlock_irqrestore(&pci_lock, flags);
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return locked;
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}
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EXPORT_SYMBOL_GPL(pci_cfg_access_trylock);
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/**
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* pci_cfg_access_unlock - Unlock PCI config reads/writes
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* @dev: pci device struct
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*
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* This function allows PCI config accesses to resume.
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*/
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void pci_cfg_access_unlock(struct pci_dev *dev)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&pci_lock, flags);
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/* This indicates a problem in the caller, but we don't need
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* to kill them, unlike a double-block above. */
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WARN_ON(!dev->block_cfg_access);
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dev->block_cfg_access = 0;
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wake_up_all(&pci_cfg_wait);
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raw_spin_unlock_irqrestore(&pci_lock, flags);
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}
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EXPORT_SYMBOL_GPL(pci_cfg_access_unlock);
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