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390a0c62c2
Currently, we have two different implementation of rwsem: 1) CONFIG_RWSEM_GENERIC_SPINLOCK (rwsem-spinlock.c) 2) CONFIG_RWSEM_XCHGADD_ALGORITHM (rwsem-xadd.c) As we are going to use a single generic implementation for rwsem-xadd.c and no architecture-specific code will be needed, there is no point in keeping two different implementations of rwsem. In most cases, the performance of rwsem-spinlock.c will be worse. It also doesn't get all the performance tuning and optimizations that had been implemented in rwsem-xadd.c over the years. For simplication, we are going to remove rwsem-spinlock.c and make all architectures use a single implementation of rwsem - rwsem-xadd.c. All references to RWSEM_GENERIC_SPINLOCK and RWSEM_XCHGADD_ALGORITHM in the code are removed. Suggested-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Waiman Long <longman@redhat.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Borislav Petkov <bp@alien8.de> Cc: Davidlohr Bueso <dave@stgolabs.net> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tim Chen <tim.c.chen@linux.intel.com> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-c6x-dev@linux-c6x.org Cc: linux-m68k@lists.linux-m68k.org Cc: linux-riscv@lists.infradead.org Cc: linux-um@lists.infradead.org Cc: linux-xtensa@linux-xtensa.org Cc: linuxppc-dev@lists.ozlabs.org Cc: nios2-dev@lists.rocketboards.org Cc: openrisc@lists.librecores.org Cc: uclinux-h8-devel@lists.sourceforge.jp Link: https://lkml.kernel.org/r/20190322143008.21313-3-longman@redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
54 lines
1.2 KiB
Plaintext
54 lines
1.2 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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menu "Host processor type and features"
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source "arch/x86/Kconfig.cpu"
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endmenu
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config UML_X86
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def_bool y
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select GENERIC_FIND_FIRST_BIT
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config 64BIT
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bool "64-bit kernel" if "$(SUBARCH)" = "x86"
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default "$(SUBARCH)" != "i386"
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config X86_32
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def_bool !64BIT
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select ARCH_32BIT_OFF_T
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select ARCH_WANT_IPC_PARSE_VERSION
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select MODULES_USE_ELF_REL
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select CLONE_BACKWARDS
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select OLD_SIGSUSPEND3
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select OLD_SIGACTION
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config X86_64
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def_bool 64BIT
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select MODULES_USE_ELF_RELA
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config ARCH_DEFCONFIG
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string
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default "arch/um/configs/i386_defconfig" if X86_32
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default "arch/um/configs/x86_64_defconfig" if X86_64
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config 3_LEVEL_PGTABLES
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bool "Three-level pagetables" if !64BIT
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default 64BIT
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help
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Three-level pagetables will let UML have more than 4G of physical
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memory. All the memory that can't be mapped directly will be treated
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as high memory.
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However, this it experimental on 32-bit architectures, so if unsure say
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N (on x86-64 it's automatically enabled, instead, as it's safe there).
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config ARCH_HAS_SC_SIGNALS
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def_bool !64BIT
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config ARCH_REUSE_HOST_VSYSCALL_AREA
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def_bool !64BIT
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config GENERIC_HWEIGHT
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def_bool y
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