Dinh Nguyen f1ce1a99f2 dts: socfpga: Update clock entry to support multiple parents ... The periph_pll and sdram_pll can have multiple parents. Update the device tree to list all the possible parents for the PLLs. Add an entry for the the f2s_sdram_ref_clk, which is a possible parent for the sdram_pll. Also remove the clock-frequency entry in the f2s_periph_ref_clk, as this property should be placed in dts file. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Steffen Trumtrar <s.trumtrar@pengutronix.de>		2014-03-02 14:58:08 -06:00
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bootp
compressed	ARM: SoC platform changes for 3.14	2014-01-23 18:40:49 -08:00
dts	dts: socfpga: Update clock entry to support multiple parents	2014-03-02 14:58:08 -06:00
.gitignore
install.sh	arm, kbuild: make "make install" not depend on vmlinux	2013-10-02 22:30:35 +02:00
Makefile	arm, kbuild: make "make install" not depend on vmlinux	2013-10-02 22:30:35 +02:00