mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-29 23:53:55 +08:00
4971f090aa
-----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJcExwOAAoJEAx081l5xIa+euIP/1NZZvSB+bsCtOwDG8I6uWsS OU5JUZ8q2dqyyFagRxzlkeSt3uWJqKp5NyNwuc9z/5u6AGF+3/97D0J1lG6Os/st 4abF6NadivYJ4cXhJ1ddIHOFMVDcAsyMWNDb93NwPwncCsQ0jt5FFOsrCyj6BGY+ ihHFlHrIyDrbBGDHz+u1E/EO5WkNnaLDoC+/k2fTRWCNI3bQL3O+orsYTI6S2uvU lQJnRfYAllgLD2p1k/rrBHcHXBv50roR0e8uhGmbdhGdp5bEW30UGBLHXxQjjSVy fQCwFwTO8X6zoxU53Zbbk+MVrp+jkTHcGKViHRuLkaHzE5mX26UXDwlXdN32ZUbK yHOJp+uDaWXX7MIz0LsB9Iqj2+eIUoFaIJMoZTMGVTNvqnTxKnoHnjAtbTH2u258 teFgmy4BIgPgo2kwEnBEZjCapou0Eivyut2wq8bTAB2Fe8LwURJpr3cioTtMLlUO L5/PoD27eFvBCAeFrQIwF3b2XiQEnBpXocmilEwP1xDMPgoyeePAfIF2iEpDvi0U jce3rLd2yVvo92xYUgoHkVTD8si/pKKnZ1D0U3+RI6pxK6s0HJEHjcNEMdvdm+2S 4qgvBQV3wlWFkXEK8PR5BHPoLntg18tKon/BTLBjgGkN9E1o9fWs1/s6KQGY4xdo l3Vvfx2LTdkgEoBssSwB =wh4W -----END PGP SIGNATURE----- Merge tag 'drm-next-2018-12-14' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Dave Airlie: "Core: - shared fencing staging removal - drop transactional atomic helpers and move helpers to new location - DP/MST atomic cleanup - Leasing cleanups and drop EXPORT_SYMBOL - Convert drivers to atomic helpers and generic fbdev. - removed deprecated obj_ref/unref in favour of get/put - Improve dumb callback documentation - MODESET_LOCK_BEGIN/END helpers panels: - CDTech panels, Banana Pi Panel, DLC1010GIG, - Olimex LCD-O-LinuXino, Samsung S6D16D0, Truly NT35597 WQXGA, - Himax HX8357D, simulated RTSM AEMv8. - GPD Win2 panel - AUO G101EVN010 vgem: - render node support ttm: - move global init out of drivers - fix LRU handling for ghost objects - Support for simultaneous submissions to multiple engines scheduler: - timeout/fault handling changes to help GPU recovery - helpers for hw with preemption support i915: - Scaler/Watermark fixes - DP MST + powerwell fixes - PSR fixes - Break long get/put shmemfs pages - Icelake fixes - Icelake DSI video mode enablement - Engine workaround improvements amdgpu: - freesync support - GPU reset enabled on CI, VI, SOC15 dGPUs - ABM support in DC - KFD support for vega12/polaris12 - SDMA paging queue on vega - More amdkfd code sharing - DCC scanout on GFX9 - DC kerneldoc - Updated SMU firmware for GFX8 chips - XGMI PSP + hive reset support - GPU reset - DC trace support - Powerplay updates for newer Polaris - Cursor plane update fast path - kfd dma-buf support virtio-gpu: - add EDID support vmwgfx: - pageflip with damage support nouveau: - Initial Turing TU104/TU106 modesetting support msm: - a2xx gpu support for apq8060 and imx5 - a2xx gpummu support - mdp4 display support for apq8060 - DPU fixes and cleanups - enhanced profiling support - debug object naming interface - get_iova/page pinning decoupling tegra: - Tegra194 host1x, VIC and display support enabled - Audio over HDMI for Tegra186 and Tegra194 exynos: - DMA/IOMMU refactoring - plane alpha + blend mode support - Color format fixes for mixer driver rcar-du: - R8A7744 and R8A77470 support - R8A77965 LVDS support imx: - fbdev emulation fix - multi-tiled scalling fixes - SPDX identifiers rockchip - dw_hdmi support - dw-mipi-dsi + dual dsi support - mailbox read size fix qxl: - fix cursor pinning vc4: - YUV support (scaling + cursor) v3d: - enable TFU (Texture Formatting Unit) mali-dp: - add support for linear tiled formats sun4i: - Display Engine 3 support - H6 DE3 mixer 0 support - H6 display engine support - dw-hdmi support - H6 HDMI phy support - implicit fence waiting - BGRX8888 support meson: - Overlay plane support - implicit fence waiting - HDMI 1.4 4k modes bridge: - i2c fixes for sii902x" * tag 'drm-next-2018-12-14' of git://anongit.freedesktop.org/drm/drm: (1403 commits) drm/amd/display: Add fast path for cursor plane updates drm/amdgpu: Enable GPU recovery by default for CI drm/amd/display: Fix duplicating scaling/underscan connector state drm/amd/display: Fix unintialized max_bpc state values Revert "drm/amd/display: Set RMX_ASPECT as default" drm/amdgpu: Fix stub function name drm/msm/dpu: Fix clock issue after bind failure drm/msm/dpu: Clean up dpu_media_info.h static inline functions drm/msm/dpu: Further cleanups for static inline functions drm/msm/dpu: Cleanup the debugfs functions drm/msm/dpu: Remove dpu_irq and unused functions drm/msm: Make irq_postinstall optional drm/msm/dpu: Cleanup callers of dpu_hw_blk_init drm/msm/dpu: Remove unused functions drm/msm/dpu: Remove dpu_crtc_is_enabled() drm/msm/dpu: Remove dpu_crtc_get_mixer_height drm/msm/dpu: Remove dpu_dbg drm/msm: dpu: Remove crtc_lock drm/msm: dpu: Remove vblank_requested flag from dpu_crtc drm/msm: dpu: Separate crtc assignment from vblank enable ...
428 lines
10 KiB
C
428 lines
10 KiB
C
/*
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* Copyright (C) 2013 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* For debugging crashes, userspace can:
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*
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* tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd
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*
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* to log the cmdstream in a format that is understood by freedreno/cffdump
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* utility. By comparing the last successfully completed fence #, to the
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* cmdstream for the next fence, you can narrow down which process and submit
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* caused the gpu crash/lockup.
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*
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* Additionally:
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*
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* tail -f /sys/kernel/debug/dri/<minor>/hangrd > logfile.rd
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*
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* will capture just the cmdstream from submits which triggered a GPU hang.
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*
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* This bypasses drm_debugfs_create_files() mainly because we need to use
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* our own fops for a bit more control. In particular, we don't want to
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* do anything if userspace doesn't have the debugfs file open.
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*
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* The module-param "rd_full", which defaults to false, enables snapshotting
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* all (non-written) buffers in the submit, rather than just cmdstream bo's.
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* This is useful to capture the contents of (for example) vbo's or textures,
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* or shader programs (if not emitted inline in cmdstream).
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*/
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#ifdef CONFIG_DEBUG_FS
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#include <linux/kfifo.h>
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#include <linux/debugfs.h>
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#include <linux/circ_buf.h>
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#include <linux/wait.h>
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#include "msm_drv.h"
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#include "msm_gpu.h"
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#include "msm_gem.h"
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static bool rd_full = false;
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MODULE_PARM_DESC(rd_full, "If true, $debugfs/.../rd will snapshot all buffer contents");
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module_param_named(rd_full, rd_full, bool, 0600);
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enum rd_sect_type {
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RD_NONE,
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RD_TEST, /* ascii text */
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RD_CMD, /* ascii text */
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RD_GPUADDR, /* u32 gpuaddr, u32 size */
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RD_CONTEXT, /* raw dump */
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RD_CMDSTREAM, /* raw dump */
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RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */
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RD_PARAM, /* u32 param_type, u32 param_val, u32 bitlen */
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RD_FLUSH, /* empty, clear previous params */
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RD_PROGRAM, /* shader program, raw dump */
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RD_VERT_SHADER,
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RD_FRAG_SHADER,
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RD_BUFFER_CONTENTS,
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RD_GPU_ID,
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};
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#define BUF_SZ 512 /* should be power of 2 */
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/* space used: */
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#define circ_count(circ) \
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(CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ))
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#define circ_count_to_end(circ) \
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(CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ))
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/* space available: */
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#define circ_space(circ) \
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(CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ))
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#define circ_space_to_end(circ) \
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(CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ))
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struct msm_rd_state {
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struct drm_device *dev;
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bool open;
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/* current submit to read out: */
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struct msm_gem_submit *submit;
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/* fifo access is synchronized on the producer side by
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* struct_mutex held by submit code (otherwise we could
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* end up w/ cmds logged in different order than they
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* were executed). And read_lock synchronizes the reads
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*/
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struct mutex read_lock;
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wait_queue_head_t fifo_event;
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struct circ_buf fifo;
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char buf[BUF_SZ];
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};
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static void rd_write(struct msm_rd_state *rd, const void *buf, int sz)
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{
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struct circ_buf *fifo = &rd->fifo;
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const char *ptr = buf;
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while (sz > 0) {
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char *fptr = &fifo->buf[fifo->head];
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int n;
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wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0);
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/* Note that smp_load_acquire() is not strictly required
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* as CIRC_SPACE_TO_END() does not access the tail more
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* than once.
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*/
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n = min(sz, circ_space_to_end(&rd->fifo));
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memcpy(fptr, ptr, n);
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smp_store_release(&fifo->head, (fifo->head + n) & (BUF_SZ - 1));
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sz -= n;
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ptr += n;
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wake_up_all(&rd->fifo_event);
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}
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}
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static void rd_write_section(struct msm_rd_state *rd,
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enum rd_sect_type type, const void *buf, int sz)
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{
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rd_write(rd, &type, 4);
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rd_write(rd, &sz, 4);
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rd_write(rd, buf, sz);
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}
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static ssize_t rd_read(struct file *file, char __user *buf,
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size_t sz, loff_t *ppos)
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{
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struct msm_rd_state *rd = file->private_data;
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struct circ_buf *fifo = &rd->fifo;
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const char *fptr = &fifo->buf[fifo->tail];
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int n = 0, ret = 0;
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mutex_lock(&rd->read_lock);
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ret = wait_event_interruptible(rd->fifo_event,
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circ_count(&rd->fifo) > 0);
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if (ret)
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goto out;
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/* Note that smp_load_acquire() is not strictly required
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* as CIRC_CNT_TO_END() does not access the head more than
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* once.
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*/
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n = min_t(int, sz, circ_count_to_end(&rd->fifo));
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if (copy_to_user(buf, fptr, n)) {
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ret = -EFAULT;
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goto out;
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}
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smp_store_release(&fifo->tail, (fifo->tail + n) & (BUF_SZ - 1));
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*ppos += n;
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wake_up_all(&rd->fifo_event);
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out:
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mutex_unlock(&rd->read_lock);
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if (ret)
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return ret;
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return n;
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}
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static int rd_open(struct inode *inode, struct file *file)
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{
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struct msm_rd_state *rd = inode->i_private;
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struct drm_device *dev = rd->dev;
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struct msm_drm_private *priv = dev->dev_private;
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struct msm_gpu *gpu = priv->gpu;
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uint64_t val;
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uint32_t gpu_id;
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int ret = 0;
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mutex_lock(&dev->struct_mutex);
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if (rd->open || !gpu) {
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ret = -EBUSY;
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goto out;
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}
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file->private_data = rd;
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rd->open = true;
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/* the parsing tools need to know gpu-id to know which
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* register database to load.
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*/
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gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val);
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gpu_id = val;
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rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id));
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out:
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mutex_unlock(&dev->struct_mutex);
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return ret;
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}
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static int rd_release(struct inode *inode, struct file *file)
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{
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struct msm_rd_state *rd = inode->i_private;
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rd->open = false;
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return 0;
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}
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static const struct file_operations rd_debugfs_fops = {
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.owner = THIS_MODULE,
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.open = rd_open,
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.read = rd_read,
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.llseek = no_llseek,
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.release = rd_release,
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};
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static void rd_cleanup(struct msm_rd_state *rd)
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{
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if (!rd)
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return;
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mutex_destroy(&rd->read_lock);
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kfree(rd);
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}
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static struct msm_rd_state *rd_init(struct drm_minor *minor, const char *name)
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{
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struct msm_rd_state *rd;
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struct dentry *ent;
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int ret = 0;
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rd = kzalloc(sizeof(*rd), GFP_KERNEL);
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if (!rd)
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return ERR_PTR(-ENOMEM);
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rd->dev = minor->dev;
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rd->fifo.buf = rd->buf;
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mutex_init(&rd->read_lock);
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init_waitqueue_head(&rd->fifo_event);
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ent = debugfs_create_file(name, S_IFREG | S_IRUGO,
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minor->debugfs_root, rd, &rd_debugfs_fops);
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if (!ent) {
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DRM_ERROR("Cannot create /sys/kernel/debug/dri/%pd/%s\n",
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minor->debugfs_root, name);
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ret = -ENOMEM;
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goto fail;
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}
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return rd;
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fail:
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rd_cleanup(rd);
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return ERR_PTR(ret);
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}
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int msm_rd_debugfs_init(struct drm_minor *minor)
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{
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struct msm_drm_private *priv = minor->dev->dev_private;
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struct msm_rd_state *rd;
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int ret;
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/* only create on first minor: */
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if (priv->rd)
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return 0;
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rd = rd_init(minor, "rd");
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if (IS_ERR(rd)) {
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ret = PTR_ERR(rd);
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goto fail;
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}
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priv->rd = rd;
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rd = rd_init(minor, "hangrd");
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if (IS_ERR(rd)) {
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ret = PTR_ERR(rd);
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goto fail;
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}
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priv->hangrd = rd;
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return 0;
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fail:
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msm_rd_debugfs_cleanup(priv);
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return ret;
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}
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void msm_rd_debugfs_cleanup(struct msm_drm_private *priv)
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{
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rd_cleanup(priv->rd);
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priv->rd = NULL;
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rd_cleanup(priv->hangrd);
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priv->hangrd = NULL;
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}
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static void snapshot_buf(struct msm_rd_state *rd,
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struct msm_gem_submit *submit, int idx,
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uint64_t iova, uint32_t size)
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{
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struct msm_gem_object *obj = submit->bos[idx].obj;
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unsigned offset = 0;
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const char *buf;
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if (iova) {
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offset = iova - submit->bos[idx].iova;
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} else {
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iova = submit->bos[idx].iova;
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size = obj->base.size;
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}
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/*
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* Always write the GPUADDR header so can get a complete list of all the
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* buffers in the cmd
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*/
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rd_write_section(rd, RD_GPUADDR,
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(uint32_t[3]){ iova, size, iova >> 32 }, 12);
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/* But only dump the contents of buffers marked READ */
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if (!(submit->bos[idx].flags & MSM_SUBMIT_BO_READ))
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return;
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buf = msm_gem_get_vaddr_active(&obj->base);
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if (IS_ERR(buf))
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return;
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buf += offset;
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rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size);
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msm_gem_put_vaddr(&obj->base);
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}
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static bool
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should_dump(struct msm_gem_submit *submit, int idx)
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{
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return rd_full || (submit->bos[idx].flags & MSM_SUBMIT_BO_DUMP);
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}
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/* called under struct_mutex */
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void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
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const char *fmt, ...)
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{
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struct drm_device *dev = submit->dev;
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struct task_struct *task;
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char msg[256];
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int i, n;
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if (!rd->open)
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return;
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/* writing into fifo is serialized by caller, and
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* rd->read_lock is used to serialize the reads
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*/
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WARN_ON(!mutex_is_locked(&dev->struct_mutex));
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if (fmt) {
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va_list args;
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va_start(args, fmt);
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n = vscnprintf(msg, sizeof(msg), fmt, args);
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va_end(args);
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rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4));
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}
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rcu_read_lock();
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task = pid_task(submit->pid, PIDTYPE_PID);
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if (task) {
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n = scnprintf(msg, sizeof(msg), "%.*s/%d: fence=%u",
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TASK_COMM_LEN, task->comm,
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pid_nr(submit->pid), submit->seqno);
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} else {
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n = scnprintf(msg, sizeof(msg), "???/%d: fence=%u",
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pid_nr(submit->pid), submit->seqno);
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}
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rcu_read_unlock();
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rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4));
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for (i = 0; i < submit->nr_bos; i++)
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if (should_dump(submit, i))
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snapshot_buf(rd, submit, i, 0, 0);
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for (i = 0; i < submit->nr_cmds; i++) {
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uint64_t iova = submit->cmd[i].iova;
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uint32_t szd = submit->cmd[i].size; /* in dwords */
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/* snapshot cmdstream bo's (if we haven't already): */
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if (!should_dump(submit, i)) {
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snapshot_buf(rd, submit, submit->cmd[i].idx,
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submit->cmd[i].iova, szd * 4);
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}
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switch (submit->cmd[i].type) {
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case MSM_SUBMIT_CMD_IB_TARGET_BUF:
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/* ignore IB-targets, we've logged the buffer, the
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* parser tool will follow the IB based on the logged
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* buffer/gpuaddr, so nothing more to do.
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*/
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break;
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case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
|
|
case MSM_SUBMIT_CMD_BUF:
|
|
rd_write_section(rd, RD_CMDSTREAM_ADDR,
|
|
(uint32_t[3]){ iova, szd, iova >> 32 }, 12);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
#endif
|