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https://github.com/edk2-porting/linux-next.git
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2fb04fdf30
Commitb70661c708("net: smc91x: use run-time configuration on all ARM machines") broke some ARM platforms through several mistakes. Firstly, the access size must correspond to the following rule: (a) at least one of 16-bit or 8-bit access size must be supported (b) 32-bit accesses are optional, and may be enabled in addition to the above. Secondly, it provides no emulation of 16-bit accesses, instead blindly making 16-bit accesses even when the platform specifies that only 8-bit is supported. Reorganise smc91x.h so we can make use of the existing 16-bit access emulation already provided - if 16-bit accesses are supported, use 16-bit accesses directly, otherwise if 8-bit accesses are supported, use the provided 16-bit access emulation. If neither, BUG(). This exactly reflects the driver behaviour prior to the commit being fixed. Since the conversion incorrectly cut down the available access sizes on several platforms, we also need to go through every platform and fix up the overly-restrictive access size: Arnd assumed that if a platform can perform 32-bit, 16-bit and 8-bit accesses, then only a 32-bit access size needed to be specified - not so, all available access sizes must be specified. This likely fixes some performance regressions in doing this: if a platform does not support 8-bit accesses, 8-bit accesses have been emulated by performing a 16-bit read-modify-write access. Tested on the Intel Assabet/Neponset platform, which supports only 8-bit accesses, which was broken by the original commit. Fixes:b70661c708("net: smc91x: use run-time configuration on all ARM machines") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Tested-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: David S. Miller <davem@davemloft.net>
557 lines
12 KiB
C
557 lines
12 KiB
C
/*
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* Copyright 2004-2009 Analog Devices Inc.
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* 2008-2009 Bluetechnix
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* 2005 National ICT Australia (NICTA)
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* Aidan Williams <aidan@nicta.com.au>
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
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#include <linux/usb/isp1362.h>
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#endif
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#include <linux/ata_platform.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <asm/dma.h>
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#include <asm/bfin5xx_spi.h>
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#include <asm/portmux.h>
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#include <asm/dpmc.h>
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#include <linux/mtd/physmap.h>
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/*
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* Name the Board for the /proc/cpuinfo
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*/
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const char bfin_board_name[] = "Bluetechnix CM BF561";
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#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
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/* all SPI peripherals info goes here */
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#if IS_ENABLED(CONFIG_MTD_M25P80)
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static struct mtd_partition bfin_spi_flash_partitions[] = {
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{
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.name = "bootloader(spi)",
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.size = 0x00020000,
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.offset = 0,
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.mask_flags = MTD_CAP_ROM
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}, {
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.name = "linux kernel(spi)",
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.size = 0xe0000,
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.offset = 0x20000
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}, {
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.name = "file system(spi)",
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.size = 0x700000,
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.offset = 0x00100000,
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}
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};
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static struct flash_platform_data bfin_spi_flash_data = {
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.name = "m25p80",
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.parts = bfin_spi_flash_partitions,
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.nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
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.type = "m25p64",
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};
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/* SPI flash chip (m25p64) */
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static struct bfin5xx_spi_chip spi_flash_chip_info = {
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.enable_dma = 0, /* use dma transfer with this chip*/
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};
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#endif
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static struct spi_board_info bfin_spi_board_info[] __initdata = {
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#if IS_ENABLED(CONFIG_MTD_M25P80)
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{
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/* the modalias must be the same as spi device driver name */
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.modalias = "m25p80", /* Name of spi_driver for this device */
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.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0, /* Framework bus number */
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.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
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.platform_data = &bfin_spi_flash_data,
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.controller_data = &spi_flash_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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#if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD183X)
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{
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.modalias = "ad183x",
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.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = 4,
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},
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#endif
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#if IS_ENABLED(CONFIG_MMC_SPI)
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{
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.modalias = "mmc_spi",
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.max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
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.bus_num = 0,
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.chip_select = 1,
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.mode = SPI_MODE_3,
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},
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#endif
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};
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/* SPI (0) */
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static struct resource bfin_spi0_resource[] = {
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[0] = {
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.start = SPI0_REGBASE,
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.end = SPI0_REGBASE + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = CH_SPI,
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.end = CH_SPI,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = IRQ_SPI,
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.end = IRQ_SPI,
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.flags = IORESOURCE_IRQ,
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},
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};
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/* SPI controller data */
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static struct bfin5xx_spi_master bfin_spi0_info = {
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.num_chipselect = 8,
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.enable_dma = 1, /* master has the ability to do dma transfer */
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.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
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};
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static struct platform_device bfin_spi0_device = {
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.name = "bfin-spi",
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.id = 0, /* Bus number */
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.num_resources = ARRAY_SIZE(bfin_spi0_resource),
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.resource = bfin_spi0_resource,
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.dev = {
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.platform_data = &bfin_spi0_info, /* Passed to driver */
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},
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};
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#endif /* spi master and devices */
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#if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
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static struct platform_device hitachi_fb_device = {
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.name = "hitachi-tx09",
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};
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#endif
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#if IS_ENABLED(CONFIG_SMC91X)
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#include <linux/smc91x.h>
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static struct smc91x_platdata smc91x_info = {
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.flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
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SMC91X_NOWAIT,
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.leda = RPC_LED_100_10,
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.ledb = RPC_LED_TX_RX,
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};
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static struct resource smc91x_resources[] = {
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{
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.name = "smc91x-regs",
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.start = 0x28000300,
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.end = 0x28000300 + 16,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PF0,
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.end = IRQ_PF0,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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.dev = {
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.platform_data = &smc91x_info,
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},
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};
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#endif
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#if IS_ENABLED(CONFIG_SMSC911X)
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#include <linux/smsc911x.h>
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static struct resource smsc911x_resources[] = {
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{
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.name = "smsc911x-memory",
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.start = 0x24008000,
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.end = 0x24008000 + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_PF43,
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.end = IRQ_PF43,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
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},
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};
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static struct smsc911x_platform_config smsc911x_config = {
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.flags = SMSC911X_USE_16BIT,
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
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.phy_interface = PHY_INTERFACE_MODE_MII,
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};
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static struct platform_device smsc911x_device = {
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.name = "smsc911x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smsc911x_resources),
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.resource = smsc911x_resources,
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.dev = {
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.platform_data = &smsc911x_config,
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},
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};
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#endif
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#if IS_ENABLED(CONFIG_USB_NET2272)
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static struct resource net2272_bfin_resources[] = {
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{
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.start = 0x24000000,
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.end = 0x24000000 + 0x100,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PF45,
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.end = IRQ_PF45,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device net2272_bfin_device = {
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.name = "net2272",
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.id = -1,
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.num_resources = ARRAY_SIZE(net2272_bfin_resources),
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.resource = net2272_bfin_resources,
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};
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#endif
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#if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
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static struct resource isp1362_hcd_resources[] = {
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{
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.start = 0x24008000,
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.end = 0x24008000,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 0x24008004,
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.end = 0x24008004,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_PF47,
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.end = IRQ_PF47,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
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},
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};
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static struct isp1362_platform_data isp1362_priv = {
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.sel15Kres = 1,
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.clknotstop = 0,
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.oc_enable = 0,
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.int_act_high = 0,
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.int_edge_triggered = 0,
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.remote_wakeup_connected = 0,
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.no_power_switching = 1,
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.power_switching_mode = 0,
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};
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static struct platform_device isp1362_hcd_device = {
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.name = "isp1362-hcd",
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.id = 0,
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.dev = {
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.platform_data = &isp1362_priv,
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},
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.num_resources = ARRAY_SIZE(isp1362_hcd_resources),
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.resource = isp1362_hcd_resources,
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};
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#endif
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#if IS_ENABLED(CONFIG_SERIAL_BFIN)
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#ifdef CONFIG_SERIAL_BFIN_UART0
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static struct resource bfin_uart0_resources[] = {
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{
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.start = BFIN_UART_THR,
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.end = BFIN_UART_GCTL+2,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART_TX,
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.end = IRQ_UART_TX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART_RX,
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.end = IRQ_UART_RX,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART_ERROR,
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.end = IRQ_UART_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART_TX,
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.end = CH_UART_TX,
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.flags = IORESOURCE_DMA,
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},
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{
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.start = CH_UART_RX,
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.end = CH_UART_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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static unsigned short bfin_uart0_peripherals[] = {
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P_UART0_TX, P_UART0_RX, 0
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};
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static struct platform_device bfin_uart0_device = {
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.name = "bfin-uart",
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.id = 0,
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.num_resources = ARRAY_SIZE(bfin_uart0_resources),
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.resource = bfin_uart0_resources,
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.dev = {
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.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
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},
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};
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#endif
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#endif
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#if IS_ENABLED(CONFIG_BFIN_SIR)
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#ifdef CONFIG_BFIN_SIR0
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static struct resource bfin_sir0_resources[] = {
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{
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.start = 0xFFC00400,
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.end = 0xFFC004FF,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_UART0_RX,
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.end = IRQ_UART0_RX+1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART0_RX,
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.end = CH_UART0_RX+1,
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.flags = IORESOURCE_DMA,
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},
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};
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static struct platform_device bfin_sir0_device = {
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.name = "bfin_sir",
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.id = 0,
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.num_resources = ARRAY_SIZE(bfin_sir0_resources),
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.resource = bfin_sir0_resources,
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};
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#endif
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#endif
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#if IS_ENABLED(CONFIG_PATA_PLATFORM)
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#define PATA_INT IRQ_PF46
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static struct pata_platform_info bfin_pata_platform_data = {
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.ioport_shift = 2,
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};
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static struct resource bfin_pata_resources[] = {
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{
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.start = 0x2400C000,
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.end = 0x2400C001F,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 0x2400D018,
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.end = 0x2400D01B,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = PATA_INT,
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.end = PATA_INT,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device bfin_pata_device = {
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.name = "pata_platform",
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.id = -1,
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.num_resources = ARRAY_SIZE(bfin_pata_resources),
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.resource = bfin_pata_resources,
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.dev = {
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.platform_data = &bfin_pata_platform_data,
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}
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};
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#endif
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#if IS_ENABLED(CONFIG_MTD_PHYSMAP)
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static struct mtd_partition para_partitions[] = {
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{
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.name = "bootloader(nor)",
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.size = 0x40000,
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.offset = 0,
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}, {
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.name = "linux kernel(nor)",
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.size = 0x100000,
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.offset = MTDPART_OFS_APPEND,
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}, {
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.name = "file system(nor)",
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.size = MTDPART_SIZ_FULL,
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.offset = MTDPART_OFS_APPEND,
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}
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};
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static struct physmap_flash_data para_flash_data = {
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.width = 2,
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.parts = para_partitions,
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.nr_parts = ARRAY_SIZE(para_partitions),
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};
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static struct resource para_flash_resource = {
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.start = 0x20000000,
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.end = 0x207fffff,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device para_flash_device = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = ¶_flash_data,
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},
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.num_resources = 1,
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.resource = ¶_flash_resource,
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};
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#endif
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static const unsigned int cclk_vlev_datasheet[] =
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{
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VRPAIR(VLEV_085, 250000000),
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VRPAIR(VLEV_090, 300000000),
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VRPAIR(VLEV_095, 313000000),
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VRPAIR(VLEV_100, 350000000),
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VRPAIR(VLEV_105, 400000000),
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VRPAIR(VLEV_110, 444000000),
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VRPAIR(VLEV_115, 450000000),
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VRPAIR(VLEV_120, 475000000),
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VRPAIR(VLEV_125, 500000000),
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VRPAIR(VLEV_130, 600000000),
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};
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static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
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.tuple_tab = cclk_vlev_datasheet,
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.tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
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.vr_settling_time = 25 /* us */,
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};
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static struct platform_device bfin_dpmc = {
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.name = "bfin dpmc",
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.dev = {
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.platform_data = &bfin_dmpc_vreg_data,
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},
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};
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static struct platform_device *cm_bf561_devices[] __initdata = {
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&bfin_dpmc,
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#if IS_ENABLED(CONFIG_FB_HITACHI_TX09)
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&hitachi_fb_device,
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#endif
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#if IS_ENABLED(CONFIG_SERIAL_BFIN)
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#ifdef CONFIG_SERIAL_BFIN_UART0
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&bfin_uart0_device,
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#endif
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#endif
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#if IS_ENABLED(CONFIG_BFIN_SIR)
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#ifdef CONFIG_BFIN_SIR0
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&bfin_sir0_device,
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#endif
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#endif
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#if IS_ENABLED(CONFIG_USB_ISP1362_HCD)
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&isp1362_hcd_device,
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#endif
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#if IS_ENABLED(CONFIG_SMC91X)
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&smc91x_device,
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#endif
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#if IS_ENABLED(CONFIG_SMSC911X)
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&smsc911x_device,
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#endif
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#if IS_ENABLED(CONFIG_USB_NET2272)
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&net2272_bfin_device,
|
|
#endif
|
|
|
|
#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
|
|
&bfin_spi0_device,
|
|
#endif
|
|
|
|
#if IS_ENABLED(CONFIG_PATA_PLATFORM)
|
|
&bfin_pata_device,
|
|
#endif
|
|
|
|
#if IS_ENABLED(CONFIG_MTD_PHYSMAP)
|
|
¶_flash_device,
|
|
#endif
|
|
};
|
|
|
|
static int __init net2272_init(void)
|
|
{
|
|
#if IS_ENABLED(CONFIG_USB_NET2272)
|
|
int ret;
|
|
|
|
ret = gpio_request(GPIO_PF46, "net2272");
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Reset USB Chip, PF46 */
|
|
gpio_direction_output(GPIO_PF46, 0);
|
|
mdelay(2);
|
|
gpio_set_value(GPIO_PF46, 1);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __init cm_bf561_init(void)
|
|
{
|
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
|
platform_add_devices(cm_bf561_devices, ARRAY_SIZE(cm_bf561_devices));
|
|
#if IS_ENABLED(CONFIG_SPI_BFIN5XX)
|
|
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
|
#endif
|
|
|
|
#if IS_ENABLED(CONFIG_PATA_PLATFORM)
|
|
irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
|
|
#endif
|
|
|
|
if (net2272_init())
|
|
pr_warning("unable to configure net2272; it probably won't work\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
arch_initcall(cm_bf561_init);
|
|
|
|
static struct platform_device *cm_bf561_early_devices[] __initdata = {
|
|
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
|
|
#ifdef CONFIG_SERIAL_BFIN_UART0
|
|
&bfin_uart0_device,
|
|
#endif
|
|
#endif
|
|
};
|
|
|
|
void __init native_machine_early_platform_add_devices(void)
|
|
{
|
|
printk(KERN_INFO "register early platform devices\n");
|
|
early_platform_add_devices(cm_bf561_early_devices,
|
|
ARRAY_SIZE(cm_bf561_early_devices));
|
|
}
|