mirror of
https://github.com/edk2-porting/linux-next.git
synced 2025-01-02 02:34:05 +08:00
f0aa848fe5
Daniel writes: As promised a stash of (mostly) fixes. Two pieces of non-fixes included: - A notch more gtt refactoring from Ben, beating to death with igt in our nightly testing. - Support for display display-less server chips (again from Ben). New hw support which is only likely to break itself ;-) Otherwise just tons of fixes: - hpd irq storm mitigation from Egbert Eich. Your -next tree already has the infrastructure, this here just supplies the logic. - sdvo hw state check fix from Egbert Eich - fb cb tune settings for the pch pll clocks on cpt/ppt - "Bring a bigger gun" coherence workaround for multi-threade, mulit-core & thrashing tiled gtt cpu access from Chris. - Update haswell mPHY code. - l3$ caching for context objects on ivb/hsw (Chris). - dp aux refclock fix for haswell (Jani) - moar overclocking fixes for snb/ivb (Ben) - ecobits ppgtt pte caching control fixes from Ville - fence stride check fixes and limit improvements (Ville) - fix up crtc force restoring, potentially resulting in tons of hw state check WARNs - OOPS fix for NULL derefencing of fb pointers when force-restoring a crtc when other crtcs are disabled and the force-restored crtc is _not_ the first one. - Fix pfit disabling on gen2/3. - Haswell ring freq scaling fixes (Chris). - backlight init/teardown fix (failed eDP init killed the lvds backlight) from Jani - cpt/ppt fdi polarity fixes from Paulo (should help a lot of the FDI link train failures). - And a bunch of smaller things all over. * 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: (56 commits) drm/i915: fix bpc vs. bpp confusion in intel_crtc_compute_config drm/i915: move cpu_transcoder to the pipe configuration drm/i915: preserve the PBC bits of TRANS_CHICKEN2 drm/i915: set CPT FDI RX polarity bits based on VBT drm/i915: Add Reenable Timer to turn Hotplug Detection back on (v4) drm/i915: Disable HPD interrupt on pin when irq storm is detected (v3) drm/i915: Mask out the HPD irq bits before setting them individually. drm/i915: (re)init HPD interrupt storm statistics drm/i915: Add HPD IRQ storm detection (v5) drm/i915: WARN when LPT-LP is not paired with ULT CPU drm/i915: don't intel_crt_init on any ULT machines drm/i915: remove comment about IVB link training from intel_pm.c drm/i915: VLV doesn't have LLC drm/i915: Scale ring, rather than ia, frequency on Haswell drm/i915: shorten debugfs output simple attributes drm/i915: Fixup pfit disabling for gen2/3 drm/i915: Fixup Oops in the pipe config computation drm/i915: ensure single initialization and cleanup of backlight device drm/i915: don't touch the PF regs if the power well is down drm/i915: add intel_using_power_well ... |
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|---|---|---|
| .. | ||
| ast | ||
| cirrus | ||
| exynos | ||
| gma500 | ||
| i2c | ||
| i810 | ||
| i915 | ||
| mga | ||
| mgag200 | ||
| nouveau | ||
| omapdrm | ||
| qxl | ||
| r128 | ||
| radeon | ||
| savage | ||
| shmobile | ||
| sis | ||
| tdfx | ||
| tegra | ||
| tilcdc | ||
| ttm | ||
| udl | ||
| via | ||
| vmwgfx | ||
| ati_pcigart.c | ||
| drm_agpsupport.c | ||
| drm_auth.c | ||
| drm_buffer.c | ||
| drm_bufs.c | ||
| drm_cache.c | ||
| drm_context.c | ||
| drm_crtc_helper.c | ||
| drm_crtc.c | ||
| drm_debugfs.c | ||
| drm_dma.c | ||
| drm_dp_helper.c | ||
| drm_drv.c | ||
| drm_edid_load.c | ||
| drm_edid.c | ||
| drm_encoder_slave.c | ||
| drm_fb_cma_helper.c | ||
| drm_fb_helper.c | ||
| drm_fops.c | ||
| drm_gem_cma_helper.c | ||
| drm_gem.c | ||
| drm_global.c | ||
| drm_hashtab.c | ||
| drm_info.c | ||
| drm_ioc32.c | ||
| drm_ioctl.c | ||
| drm_irq.c | ||
| drm_lock.c | ||
| drm_memory.c | ||
| drm_mm.c | ||
| drm_modes.c | ||
| drm_pci.c | ||
| drm_platform.c | ||
| drm_prime.c | ||
| drm_proc.c | ||
| drm_scatter.c | ||
| drm_stub.c | ||
| drm_sysfs.c | ||
| drm_trace_points.c | ||
| drm_trace.h | ||
| drm_usb.c | ||
| drm_vm.c | ||
| Kconfig | ||
| Makefile | ||
| README.drm | ||
************************************************************
* For the very latest on DRI development, please see: *
* http://dri.freedesktop.org/ *
************************************************************
The Direct Rendering Manager (drm) is a device-independent kernel-level
device driver that provides support for the XFree86 Direct Rendering
Infrastructure (DRI).
The DRM supports the Direct Rendering Infrastructure (DRI) in four major
ways:
1. The DRM provides synchronized access to the graphics hardware via
the use of an optimized two-tiered lock.
2. The DRM enforces the DRI security policy for access to the graphics
hardware by only allowing authenticated X11 clients access to
restricted regions of memory.
3. The DRM provides a generic DMA engine, complete with multiple
queues and the ability to detect the need for an OpenGL context
switch.
4. The DRM is extensible via the use of small device-specific modules
that rely extensively on the API exported by the DRM module.
Documentation on the DRI is available from:
http://dri.freedesktop.org/wiki/Documentation
http://sourceforge.net/project/showfiles.php?group_id=387
http://dri.sourceforge.net/doc/
For specific information about kernel-level support, see:
The Direct Rendering Manager, Kernel Support for the Direct Rendering
Infrastructure
http://dri.sourceforge.net/doc/drm_low_level.html
Hardware Locking for the Direct Rendering Infrastructure
http://dri.sourceforge.net/doc/hardware_locking_low_level.html
A Security Analysis of the Direct Rendering Infrastructure
http://dri.sourceforge.net/doc/security_low_level.html