mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-28 23:23:55 +08:00
ba36d53db5
The Aspeed SoC has timer IP with a very similar register layout to the moxart timer. This patch adds support for the fourth and fifth gen aspeed SoCs, and has been tested on the ast2400 and ast2500. Signed-off-by: Joel Stanley <joel@jms.id.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
20 lines
451 B
Plaintext
20 lines
451 B
Plaintext
MOXA ART timer
|
|
|
|
Required properties:
|
|
|
|
- compatible : Must be one of:
|
|
- "moxa,moxart-timer"
|
|
- "aspeed,ast2400-timer"
|
|
- reg : Should contain registers location and length
|
|
- interrupts : Should contain the timer interrupt number
|
|
- clocks : Should contain phandle for the clock that drives the counter
|
|
|
|
Example:
|
|
|
|
timer: timer@98400000 {
|
|
compatible = "moxa,moxart-timer";
|
|
reg = <0x98400000 0x42>;
|
|
interrupts = <19 1>;
|
|
clocks = <&coreclk>;
|
|
};
|