mirror of
https://github.com/edk2-porting/linux-next.git
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29cf7a30f8
In summary, this DMI quirk uses the _CRS info by default for the ASUS M2V-MX SE by turning on `pci=use_crs` and is similar to the quirk added by commit2491762cfb
("x86/PCI: use host bridge _CRS info on ASRock ALiveSATA2-GLAN") whose commit message should be read for further information. Since commit3e3da00c01
("x86/pci: AMD one chain system to use pci read out res") Linux gives the following oops: parport0: PC-style at 0x378, irq 7 [PCSPP,TRISTATE] HDA Intel 0000:20:01.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17 HDA Intel 0000:20:01.0: setting latency timer to 64 BUG: unable to handle kernel paging request at ffffc90011c08000 IP: [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel] PGD 13781a067 PUD 13781b067 PMD 1300ba067 PTE 800000fd00000173 Oops: 0009 [#1] SMP last sysfs file: /sys/module/snd_pcm/initstate CPU 0 Modules linked in: snd_hda_intel(+) snd_hda_codec snd_hwdep snd_pcm_oss snd_mixer_oss snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event tpm_tis tpm snd_seq tpm_bios psmouse parport_pc snd_timer snd_seq_device parport processor evdev snd i2c_viapro thermal_sys amd64_edac_mod k8temp i2c_core soundcore shpchp pcspkr serio_raw asus_atk0110 pci_hotplug edac_core button snd_page_alloc edac_mce_amd ext3 jbd mbcache sha256_generic cryptd aes_x86_64 aes_generic cbc dm_crypt dm_mod raid1 md_mod usbhid hid sg sd_mod crc_t10dif sr_mod cdrom ata_generic uhci_hcd sata_via pata_via libata ehci_hcd usbcore scsi_mod via_rhine mii nls_base [last unloaded: scsi_wait_scan] Pid: 1153, comm: work_for_cpu Not tainted 2.6.37-1-amd64 #1 M2V-MX SE/System Product Name RIP: 0010:[<ffffffffa0578402>] [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel] RSP: 0018:ffff88013153fe50 EFLAGS: 00010286 RAX: ffffc90011c08000 RBX: ffff88013029ec00 RCX: 0000000000000006 RDX: 0000000000000000 RSI: 0000000000000246 RDI: 0000000000000246 RBP: ffff88013341d000 R08: 0000000000000000 R09: 0000000000000040 R10: 0000000000000286 R11: 0000000000003731 R12: ffff88013029c400 R13: 0000000000000000 R14: 0000000000000000 R15: ffff88013341d090 FS: 0000000000000000(0000) GS:ffff8800bfc00000(0000) knlGS:00000000f7610ab0 CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b CR2: ffffc90011c08000 CR3: 0000000132f57000 CR4: 00000000000006f0 DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400 Process work_for_cpu (pid: 1153, threadinfo ffff88013153e000, task ffff8801303c86c0) Stack: 0000000000000005 ffffffff8123ad65 00000000000136c0 ffff88013029c400 ffff8801303c8998 ffff88013341d000 ffff88013341d090 ffff8801322d9dc8 ffff88013341d208 0000000000000000 0000000000000000 ffffffff811ad232 Call Trace: [<ffffffff8123ad65>] ? __pm_runtime_set_status+0x162/0x186 [<ffffffff811ad232>] ? local_pci_probe+0x49/0x92 [<ffffffff8105afc5>] ? do_work_for_cpu+0x0/0x1b [<ffffffff8105afc5>] ? do_work_for_cpu+0x0/0x1b [<ffffffff8105afd0>] ? do_work_for_cpu+0xb/0x1b [<ffffffff8105fd3f>] ? kthread+0x7a/0x82 [<ffffffff8100a824>] ? kernel_thread_helper+0x4/0x10 [<ffffffff8105fcc5>] ? kthread+0x0/0x82 [<ffffffff8100a820>] ? kernel_thread_helper+0x0/0x10 Code: f4 01 00 00 ef 31 f6 48 89 df e8 29 dd ff ff 85 c0 0f 88 2b 03 00 00 48 89 ef e8 b4 39 c3 e0 8b 7b 40 e8 fc 9d b1 e0 48 8b 43 38 <66> 8b 10 66 89 14 24 8b 43 14 83 e8 03 83 f8 01 77 32 31 d2 be RIP [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel] RSP <ffff88013153fe50> CR2: ffffc90011c08000 ---[ end trace 8d1f3ebc136437fd ]--- Trusting the ACPI _CRS information (`pci=use_crs`) fixes this problem. $ dmesg | grep -i crs # with the quirk PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug The match has to be against the DMI board entries though since the vendor entries are not populated. DMI: System manufacturer System Product Name/M2V-MX SE, BIOS 0304 10/30/2007 This quirk should be removed when `pci=use_crs` is enabled for machines from 2006 or earlier or some other solution is implemented. Using coreboot [1] with this board the problem does not exist but this quirk also does not affect it either. To be safe though the check is tightened to only take effect when the BIOS from American Megatrends is used. 15:13 < ruik> but coreboot does not need that 15:13 < ruik> because i have there only one root bus 15:13 < ruik> the audio is behind a bridge $ sudo dmidecode BIOS Information Vendor: American Megatrends Inc. Version: 0304 Release Date: 10/30/2007 [1] http://www.coreboot.org/ Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=30552 Cc: stable@kernel.org (2.6.34) Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: x86@kernel.org Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
430 lines
10 KiB
C
430 lines
10 KiB
C
#include <linux/pci.h>
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#include <linux/acpi.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/dmi.h>
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#include <linux/slab.h>
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#include <asm/numa.h>
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#include <asm/pci_x86.h>
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struct pci_root_info {
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struct acpi_device *bridge;
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char *name;
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unsigned int res_num;
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struct resource *res;
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struct pci_bus *bus;
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int busnum;
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};
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static bool pci_use_crs = true;
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static int __init set_use_crs(const struct dmi_system_id *id)
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{
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pci_use_crs = true;
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return 0;
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}
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static const struct dmi_system_id pci_use_crs_table[] __initconst = {
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/* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
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{
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.callback = set_use_crs,
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.ident = "IBM System x3800",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
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DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
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},
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},
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/* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
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/* 2006 AMD HT/VIA system with two host bridges */
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{
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.callback = set_use_crs,
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.ident = "ASRock ALiveSATA2-GLAN",
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.matches = {
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DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
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},
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},
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/* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
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/* 2006 AMD HT/VIA system with two host bridges */
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{
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.callback = set_use_crs,
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.ident = "ASUS M2V-MX SE",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
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DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
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DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
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},
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},
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{}
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};
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void __init pci_acpi_crs_quirks(void)
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{
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int year;
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if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008)
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pci_use_crs = false;
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dmi_check_system(pci_use_crs_table);
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/*
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* If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
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* takes precedence over anything we figured out above.
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*/
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if (pci_probe & PCI_ROOT_NO_CRS)
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pci_use_crs = false;
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else if (pci_probe & PCI_USE__CRS)
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pci_use_crs = true;
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printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
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"if necessary, use \"pci=%s\" and report a bug\n",
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pci_use_crs ? "Using" : "Ignoring",
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pci_use_crs ? "nocrs" : "use_crs");
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}
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static acpi_status
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resource_to_addr(struct acpi_resource *resource,
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struct acpi_resource_address64 *addr)
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{
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acpi_status status;
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struct acpi_resource_memory24 *memory24;
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struct acpi_resource_memory32 *memory32;
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struct acpi_resource_fixed_memory32 *fixed_memory32;
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memset(addr, 0, sizeof(*addr));
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switch (resource->type) {
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case ACPI_RESOURCE_TYPE_MEMORY24:
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memory24 = &resource->data.memory24;
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addr->resource_type = ACPI_MEMORY_RANGE;
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addr->minimum = memory24->minimum;
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addr->address_length = memory24->address_length;
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addr->maximum = addr->minimum + addr->address_length - 1;
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return AE_OK;
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case ACPI_RESOURCE_TYPE_MEMORY32:
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memory32 = &resource->data.memory32;
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addr->resource_type = ACPI_MEMORY_RANGE;
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addr->minimum = memory32->minimum;
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addr->address_length = memory32->address_length;
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addr->maximum = addr->minimum + addr->address_length - 1;
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return AE_OK;
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case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
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fixed_memory32 = &resource->data.fixed_memory32;
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addr->resource_type = ACPI_MEMORY_RANGE;
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addr->minimum = fixed_memory32->address;
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addr->address_length = fixed_memory32->address_length;
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addr->maximum = addr->minimum + addr->address_length - 1;
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return AE_OK;
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case ACPI_RESOURCE_TYPE_ADDRESS16:
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case ACPI_RESOURCE_TYPE_ADDRESS32:
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case ACPI_RESOURCE_TYPE_ADDRESS64:
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status = acpi_resource_to_address64(resource, addr);
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if (ACPI_SUCCESS(status) &&
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(addr->resource_type == ACPI_MEMORY_RANGE ||
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addr->resource_type == ACPI_IO_RANGE) &&
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addr->address_length > 0) {
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return AE_OK;
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}
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break;
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}
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return AE_ERROR;
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}
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static acpi_status
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count_resource(struct acpi_resource *acpi_res, void *data)
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{
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struct pci_root_info *info = data;
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struct acpi_resource_address64 addr;
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acpi_status status;
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status = resource_to_addr(acpi_res, &addr);
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if (ACPI_SUCCESS(status))
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info->res_num++;
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return AE_OK;
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}
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static acpi_status
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setup_resource(struct acpi_resource *acpi_res, void *data)
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{
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struct pci_root_info *info = data;
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struct resource *res;
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struct acpi_resource_address64 addr;
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acpi_status status;
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unsigned long flags;
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u64 start, end;
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status = resource_to_addr(acpi_res, &addr);
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if (!ACPI_SUCCESS(status))
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return AE_OK;
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if (addr.resource_type == ACPI_MEMORY_RANGE) {
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flags = IORESOURCE_MEM;
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if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
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flags |= IORESOURCE_PREFETCH;
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} else if (addr.resource_type == ACPI_IO_RANGE) {
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flags = IORESOURCE_IO;
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} else
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return AE_OK;
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start = addr.minimum + addr.translation_offset;
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end = addr.maximum + addr.translation_offset;
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res = &info->res[info->res_num];
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res->name = info->name;
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res->flags = flags;
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res->start = start;
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res->end = end;
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res->child = NULL;
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if (!pci_use_crs) {
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dev_printk(KERN_DEBUG, &info->bridge->dev,
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"host bridge window %pR (ignored)\n", res);
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return AE_OK;
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}
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info->res_num++;
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if (addr.translation_offset)
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dev_info(&info->bridge->dev, "host bridge window %pR "
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"(PCI address [%#llx-%#llx])\n",
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res, res->start - addr.translation_offset,
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res->end - addr.translation_offset);
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else
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dev_info(&info->bridge->dev, "host bridge window %pR\n", res);
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return AE_OK;
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}
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static bool resource_contains(struct resource *res, resource_size_t point)
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{
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if (res->start <= point && point <= res->end)
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return true;
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return false;
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}
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static void coalesce_windows(struct pci_root_info *info, unsigned long type)
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{
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int i, j;
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struct resource *res1, *res2;
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for (i = 0; i < info->res_num; i++) {
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res1 = &info->res[i];
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if (!(res1->flags & type))
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continue;
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for (j = i + 1; j < info->res_num; j++) {
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res2 = &info->res[j];
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if (!(res2->flags & type))
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continue;
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/*
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* I don't like throwing away windows because then
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* our resources no longer match the ACPI _CRS, but
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* the kernel resource tree doesn't allow overlaps.
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*/
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if (resource_contains(res1, res2->start) ||
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resource_contains(res1, res2->end) ||
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resource_contains(res2, res1->start) ||
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resource_contains(res2, res1->end)) {
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res1->start = min(res1->start, res2->start);
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res1->end = max(res1->end, res2->end);
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dev_info(&info->bridge->dev,
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"host bridge window expanded to %pR; %pR ignored\n",
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res1, res2);
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res2->flags = 0;
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}
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}
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}
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}
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static void add_resources(struct pci_root_info *info)
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{
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int i;
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struct resource *res, *root, *conflict;
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if (!pci_use_crs)
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return;
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coalesce_windows(info, IORESOURCE_MEM);
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coalesce_windows(info, IORESOURCE_IO);
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for (i = 0; i < info->res_num; i++) {
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res = &info->res[i];
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if (res->flags & IORESOURCE_MEM)
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root = &iomem_resource;
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else if (res->flags & IORESOURCE_IO)
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root = &ioport_resource;
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else
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continue;
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conflict = insert_resource_conflict(root, res);
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if (conflict)
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dev_info(&info->bridge->dev,
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"ignoring host bridge window %pR (conflicts with %s %pR)\n",
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res, conflict->name, conflict);
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else
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pci_bus_add_resource(info->bus, res, 0);
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}
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}
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static void
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get_current_resources(struct acpi_device *device, int busnum,
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int domain, struct pci_bus *bus)
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{
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struct pci_root_info info;
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size_t size;
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if (pci_use_crs)
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pci_bus_remove_resources(bus);
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info.bridge = device;
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info.bus = bus;
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info.res_num = 0;
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acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
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&info);
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if (!info.res_num)
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return;
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size = sizeof(*info.res) * info.res_num;
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info.res = kmalloc(size, GFP_KERNEL);
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if (!info.res)
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goto res_alloc_fail;
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info.name = kasprintf(GFP_KERNEL, "PCI Bus %04x:%02x", domain, busnum);
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if (!info.name)
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goto name_alloc_fail;
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info.res_num = 0;
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acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
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&info);
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add_resources(&info);
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return;
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name_alloc_fail:
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kfree(info.res);
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res_alloc_fail:
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return;
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}
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struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
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{
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struct acpi_device *device = root->device;
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int domain = root->segment;
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int busnum = root->secondary.start;
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struct pci_bus *bus;
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struct pci_sysdata *sd;
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int node;
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#ifdef CONFIG_ACPI_NUMA
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int pxm;
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#endif
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if (domain && !pci_domains_supported) {
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printk(KERN_WARNING "pci_bus %04x:%02x: "
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"ignored (multiple domains not supported)\n",
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domain, busnum);
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return NULL;
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}
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node = -1;
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#ifdef CONFIG_ACPI_NUMA
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pxm = acpi_get_pxm(device->handle);
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if (pxm >= 0)
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node = pxm_to_node(pxm);
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if (node != -1)
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set_mp_bus_to_node(busnum, node);
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else
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#endif
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node = get_mp_bus_to_node(busnum);
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if (node != -1 && !node_online(node))
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node = -1;
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/* Allocate per-root-bus (not per bus) arch-specific data.
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* TODO: leak; this memory is never freed.
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* It's arguable whether it's worth the trouble to care.
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*/
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sd = kzalloc(sizeof(*sd), GFP_KERNEL);
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if (!sd) {
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printk(KERN_WARNING "pci_bus %04x:%02x: "
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"ignored (out of memory)\n", domain, busnum);
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return NULL;
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}
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sd->domain = domain;
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sd->node = node;
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/*
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* Maybe the desired pci bus has been already scanned. In such case
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* it is unnecessary to scan the pci bus with the given domain,busnum.
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*/
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bus = pci_find_bus(domain, busnum);
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if (bus) {
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/*
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* If the desired bus exits, the content of bus->sysdata will
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* be replaced by sd.
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*/
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memcpy(bus->sysdata, sd, sizeof(*sd));
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kfree(sd);
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} else {
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bus = pci_create_bus(NULL, busnum, &pci_root_ops, sd);
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if (bus) {
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get_current_resources(device, busnum, domain, bus);
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bus->subordinate = pci_scan_child_bus(bus);
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}
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}
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/* After the PCI-E bus has been walked and all devices discovered,
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* configure any settings of the fabric that might be necessary.
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*/
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if (bus) {
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struct pci_bus *child;
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list_for_each_entry(child, &bus->children, node) {
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struct pci_dev *self = child->self;
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if (!self)
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continue;
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pcie_bus_configure_settings(child, self->pcie_mpss);
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}
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}
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if (!bus)
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kfree(sd);
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if (bus && node != -1) {
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#ifdef CONFIG_ACPI_NUMA
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if (pxm >= 0)
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dev_printk(KERN_DEBUG, &bus->dev,
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"on NUMA node %d (pxm %d)\n", node, pxm);
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#else
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dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
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#endif
|
|
}
|
|
|
|
return bus;
|
|
}
|
|
|
|
int __init pci_acpi_init(void)
|
|
{
|
|
struct pci_dev *dev = NULL;
|
|
|
|
if (acpi_noirq)
|
|
return -ENODEV;
|
|
|
|
printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
|
|
acpi_irq_penalty_init();
|
|
pcibios_enable_irq = acpi_pci_irq_enable;
|
|
pcibios_disable_irq = acpi_pci_irq_disable;
|
|
x86_init.pci.init_irq = x86_init_noop;
|
|
|
|
if (pci_routeirq) {
|
|
/*
|
|
* PCI IRQ routing is set up by pci_enable_device(), but we
|
|
* also do it here in case there are still broken drivers that
|
|
* don't use pci_enable_device().
|
|
*/
|
|
printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
|
|
for_each_pci_dev(dev)
|
|
acpi_pci_irq_enable(dev);
|
|
}
|
|
|
|
return 0;
|
|
}
|