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ec6754a7b9
Set the dbgu pinctrl config by default as we have only one possible config For other uart set the rxd/txd by default. For at91sam9x5ek create soc based dts as we need to include specific soc dtsi. Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
402 lines
8.9 KiB
Plaintext
402 lines
8.9 KiB
Plaintext
/*
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* at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
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* applies to AT91SAM9G45, AT91SAM9M10,
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* AT91SAM9G46, AT91SAM9M11 SoC
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*
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* Copyright (C) 2011 Atmel,
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* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Atmel AT91SAM9G45 family SoC";
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compatible = "atmel,at91sam9g45";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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serial4 = &usart3;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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gpio4 = &pioE;
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tcb0 = &tcb0;
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tcb1 = &tcb1;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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memory {
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reg = <0x70000000 0x10000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <3>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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atmel,external-irqs = <31>;
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};
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ramc0: ramc@ffffe400 {
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compatible = "atmel,at91sam9g45-ddramc";
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reg = <0xffffe400 0x200
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0xffffe600 0x200>;
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};
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91rm9200-pmc";
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reg = <0xfffffc00 0x100>;
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};
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rstc@fffffd00 {
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compatible = "atmel,at91sam9g45-rstc";
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reg = <0xfffffd00 0x10>;
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};
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pit: timer@fffffd30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffd30 0xf>;
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interrupts = <1 4 7>;
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};
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shdwc@fffffd10 {
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compatible = "atmel,at91sam9rl-shdwc";
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reg = <0xfffffd10 0x10>;
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};
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tcb0: timer@fff7c000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfff7c000 0x100>;
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interrupts = <18 4 0>;
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};
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tcb1: timer@fffd4000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfffd4000 0x100>;
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interrupts = <18 4 0>;
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};
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dma: dma-controller@ffffec00 {
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compatible = "atmel,at91sam9g45-dma";
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reg = <0xffffec00 0x200>;
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interrupts = <21 4 0>;
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};
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pinctrl@fffff200 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
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ranges = <0xfffff200 0xfffff200 0xa00>;
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atmel,mux-mask = <
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/* A B */
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0xffffffff 0xffc003ff /* pioA */
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0xffffffff 0x800f8f00 /* pioB */
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0xffffffff 0x00000e00 /* pioC */
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0xffffffff 0xff0c1381 /* pioD */
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0xffffffff 0x81ffff81 /* pioE */
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>;
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/* shared pinctrl settings */
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<1 12 0x1 0x0 /* PB12 periph A */
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1 13 0x1 0x0>; /* PB13 periph A */
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};
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};
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<1 19 0x1 0x1 /* PB19 periph A with pullup */
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1 18 0x1 0x0>; /* PB18 periph A */
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};
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pinctrl_uart0_rts_cts: uart0_rts_cts-0 {
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atmel,pins =
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<1 17 0x2 0x0 /* PB17 periph B */
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1 15 0x2 0x0>; /* PB15 periph B */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<1 4 0x1 0x1 /* PB4 periph A with pullup */
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1 5 0x1 0x0>; /* PB5 periph A */
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};
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pinctrl_uart1_rts_cts: uart1_rts_cts-0 {
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atmel,pins =
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<3 16 0x1 0x0 /* PD16 periph A */
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3 17 0x1 0x0>; /* PD17 periph A */
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};
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};
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uart2 {
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pinctrl_uart2: uart2-0 {
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atmel,pins =
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<1 6 0x1 0x1 /* PB6 periph A with pullup */
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1 7 0x1 0x0>; /* PB7 periph A */
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};
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pinctrl_uart2_rts_cts: uart2_rts_cts-0 {
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atmel,pins =
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<2 9 0x2 0x0 /* PC9 periph B */
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2 11 0x2 0x0>; /* PC11 periph B */
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};
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};
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uart3 {
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pinctrl_uart3: uart3-0 {
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atmel,pins =
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<1 8 0x1 0x1 /* PB9 periph A with pullup */
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1 9 0x1 0x0>; /* PB8 periph A */
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};
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pinctrl_uart3_rts_cts: uart3_rts_cts-0 {
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atmel,pins =
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<0 23 0x2 0x0 /* PA23 periph B */
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0 24 0x2 0x0>; /* PA24 periph B */
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};
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};
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pioA: gpio@fffff200 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff200 0x200>;
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interrupts = <2 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioB: gpio@fffff400 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x200>;
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interrupts = <3 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioC: gpio@fffff600 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff600 0x200>;
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interrupts = <4 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioD: gpio@fffff800 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff800 0x200>;
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interrupts = <5 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioE: gpio@fffffa00 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffffa00 0x200>;
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interrupts = <5 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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dbgu: serial@ffffee00 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xffffee00 0x200>;
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interrupts = <1 4 7>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dbgu>;
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status = "disabled";
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};
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usart0: serial@fff8c000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfff8c000 0x200>;
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interrupts = <7 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart0>;
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status = "disabled";
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};
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usart1: serial@fff90000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfff90000 0x200>;
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interrupts = <8 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "disabled";
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};
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usart2: serial@fff94000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfff94000 0x200>;
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interrupts = <9 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "disabled";
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};
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usart3: serial@fff98000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfff98000 0x200>;
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interrupts = <10 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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status = "disabled";
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};
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macb0: ethernet@fffbc000 {
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compatible = "cdns,at32ap7000-macb", "cdns,macb";
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reg = <0xfffbc000 0x100>;
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interrupts = <25 4 3>;
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status = "disabled";
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};
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i2c0: i2c@fff84000 {
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compatible = "atmel,at91sam9g10-i2c";
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reg = <0xfff84000 0x100>;
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interrupts = <12 4 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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i2c1: i2c@fff88000 {
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compatible = "atmel,at91sam9g10-i2c";
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reg = <0xfff88000 0x100>;
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interrupts = <13 4 6>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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adc0: adc@fffb0000 {
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compatible = "atmel,at91sam9260-adc";
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reg = <0xfffb0000 0x100>;
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interrupts = <20 4 0>;
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atmel,adc-use-external-triggers;
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atmel,adc-channels-used = <0xff>;
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atmel,adc-vref = <3300>;
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atmel,adc-num-channels = <8>;
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atmel,adc-startup-time = <40>;
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atmel,adc-channel-base = <0x30>;
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atmel,adc-drdy-mask = <0x10000>;
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atmel,adc-status-register = <0x1c>;
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atmel,adc-trigger-register = <0x08>;
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trigger@0 {
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trigger-name = "external-rising";
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trigger-value = <0x1>;
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trigger-external;
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};
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trigger@1 {
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trigger-name = "external-falling";
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trigger-value = <0x2>;
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trigger-external;
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};
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trigger@2 {
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trigger-name = "external-any";
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trigger-value = <0x3>;
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trigger-external;
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};
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trigger@3 {
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trigger-name = "continuous";
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trigger-value = <0x6>;
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};
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};
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};
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nand0: nand@40000000 {
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compatible = "atmel,at91rm9200-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40000000 0x10000000
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0xffffe200 0x200
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>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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gpios = <&pioC 8 0
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&pioC 14 0
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0
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>;
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status = "disabled";
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};
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usb0: ohci@00700000 {
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compatible = "atmel,at91rm9200-ohci", "usb-ohci";
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reg = <0x00700000 0x100000>;
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interrupts = <22 4 2>;
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status = "disabled";
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};
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usb1: ehci@00800000 {
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compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
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reg = <0x00800000 0x100000>;
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interrupts = <22 4 2>;
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status = "disabled";
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};
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};
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i2c@0 {
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compatible = "i2c-gpio";
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gpios = <&pioA 20 0 /* sda */
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&pioA 21 0 /* scl */
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>;
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i2c-gpio,sda-open-drain;
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i2c-gpio,scl-open-drain;
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i2c-gpio,delay-us = <5>; /* ~100 kHz */
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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