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linux-next/include/soc
Vladimir Oltean ebb4c6a990 net: mscc: ocelot: cross-check the sequence id from the timestamp FIFO with the skb PTP header
The sad reality is that when a PTP frame with a TX timestamping request
is transmitted, it isn't guaranteed that it will make it all the way to
the wire (due to congestion inside the switch), and that a timestamp
will be taken by the hardware and placed in the timestamp FIFO where an
IRQ will be raised for it.

The implication is that if enough PTP frames are silently dropped by the
hardware such that the timestamp ID has rolled over, it is possible to
match a timestamp to an old skb.

Furthermore, nobody will match on the real skb corresponding to this
timestamp, since we stupidly matched on a previous one that was stale in
the queue, and stopped there.

So PTP timestamping will be broken and there will be no way to recover.

It looks like the hardware parses the sequenceID from the PTP header,
and also provides that metadata for each timestamp. The driver currently
ignores this, but it shouldn't.

As an extra resiliency measure, do the following:

- check whether the PTP sequenceID also matches between the skb and the
  timestamp, treat the skb as stale otherwise and free it

- if we see a stale skb, don't stop there and try to match an skb one
  more time, chances are there's one more skb in the queue with the same
  timestamp ID, otherwise we wouldn't have ever found the stale one (it
  is by timestamp ID that we matched it).

While this does not prevent PTP packet drops, it at least prevents
the catastrophic consequences of incorrect timestamp matching.

Since we already call ptp_classify_raw in the TX path, save the result
in the skb->cb of the clone, and just use that result in the interrupt
code path.

Fixes: 4e3b0468e6 ("net: mscc: PTP Hardware Clock (PHC) support")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-10-12 17:35:18 -07:00
..
arc include/: replace HTTP links with HTTPS ones 2020-08-12 10:57:59 -07:00
at91 ARM: at91: ddr: add registers definitions for sama7g5's ddr 2021-07-19 14:32:12 +02:00
bcm2835 firmware: raspberrypi: Introduce devm_rpi_firmware_get() 2021-03-22 17:59:51 +01:00
canaan clk: Add RISC-V Canaan Kendryte K210 clock driver 2021-02-22 17:51:04 -08:00
fsl Revert "soc: fsl: qe: introduce qe_io{read,write}* wrappers" 2021-04-06 15:40:48 -05:00
imx ARM: imx: Initialize SoC ID on i.MX50 2021-05-13 15:42:21 +08:00
mediatek IOMMU Updates for Linux v5.12 2021-02-22 10:31:29 -08:00
microchip mbox: add polarfire soc system controller mailbox 2021-06-26 12:06:48 -05:00
mscc net: mscc: ocelot: cross-check the sequence id from the timestamp FIFO with the skb PTP header 2021-10-12 17:35:18 -07:00
qcom soc: qcom: rpmh: Remove serialization of TCS commands 2021-01-07 10:59:46 -06:00
rockchip treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288 2019-06-05 17:36:37 +02:00
sa1100 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
sifive riscv: move sifive_l2_cache.h to include/soc 2020-01-12 10:12:44 -08:00
tegra soc/tegra: Changes for v5.15-rc1 2021-08-18 15:23:38 +02:00