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eb8c88808c
The DP (display processor) channel disable code tried to busy wait for the DP sync flow end interrupt status bit when disabling the partial plane without a full modeset. That never worked reliably, and it was disabled completely by the recent "gpu: ipu-v3: remove IRQ dance on DC channel disable" patch, causing ipu_wait_interrupt to always time out after 50 ms, which in turn would trigger a timeout in drm_atomic_helper_wait_for_vblanks. This patch changes ipu_plane_atomic_disable to only queue a DP channel register update at the next frame boundary and set a flag, which can be done without any waiting whatsoever. The imx_drm_atomic_commit_tail then calls a new ipu_plane_disable_deferred function that does the actual IDMAC teardown of the planes that are flagged for deferred disabling, after waiting for the vblank. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> |
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| .. | ||
| ipu-common.c | ||
| ipu-cpmem.c | ||
| ipu-csi.c | ||
| ipu-dc.c | ||
| ipu-di.c | ||
| ipu-dmfc.c | ||
| ipu-dp.c | ||
| ipu-ic.c | ||
| ipu-image-convert.c | ||
| ipu-prv.h | ||
| ipu-smfc.c | ||
| ipu-vdi.c | ||
| Kconfig | ||
| Makefile | ||