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https://github.com/edk2-porting/linux-next.git
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d22a6966b8
This adds new accessors for segment_boundary_mask in device_dma_parameters structure in the same way I did for max_segment_size. So we can easily change where to place struct device_dma_parameters in the future. dma_get_segment boundary returns 0xffffffff if dma_parms in struct device isn't set up properly. 0xffffffff is the default value used in the block layer and the scsi mid layer. Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Jens Axboe <jens.axboe@oracle.com> Cc: Greg KH <greg@kroah.com> Cc: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
150 lines
3.9 KiB
C
150 lines
3.9 KiB
C
#ifndef _LINUX_DMA_MAPPING_H
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#define _LINUX_DMA_MAPPING_H
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#include <linux/device.h>
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#include <linux/err.h>
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/* These definitions mirror those in pci.h, so they can be used
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* interchangeably with their PCI_ counterparts */
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enum dma_data_direction {
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DMA_BIDIRECTIONAL = 0,
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DMA_TO_DEVICE = 1,
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DMA_FROM_DEVICE = 2,
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DMA_NONE = 3,
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};
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#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
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/*
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* NOTE: do not use the below macros in new code and do not add new definitions
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* here.
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*
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* Instead, just open-code DMA_BIT_MASK(n) within your driver
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*/
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#define DMA_64BIT_MASK DMA_BIT_MASK(64)
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#define DMA_48BIT_MASK DMA_BIT_MASK(48)
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#define DMA_47BIT_MASK DMA_BIT_MASK(47)
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#define DMA_40BIT_MASK DMA_BIT_MASK(40)
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#define DMA_39BIT_MASK DMA_BIT_MASK(39)
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#define DMA_35BIT_MASK DMA_BIT_MASK(35)
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#define DMA_32BIT_MASK DMA_BIT_MASK(32)
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#define DMA_31BIT_MASK DMA_BIT_MASK(31)
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#define DMA_30BIT_MASK DMA_BIT_MASK(30)
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#define DMA_29BIT_MASK DMA_BIT_MASK(29)
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#define DMA_28BIT_MASK DMA_BIT_MASK(28)
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#define DMA_24BIT_MASK DMA_BIT_MASK(24)
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#define DMA_MASK_NONE 0x0ULL
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static inline int valid_dma_direction(int dma_direction)
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{
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return ((dma_direction == DMA_BIDIRECTIONAL) ||
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(dma_direction == DMA_TO_DEVICE) ||
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(dma_direction == DMA_FROM_DEVICE));
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}
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static inline int is_device_dma_capable(struct device *dev)
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{
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return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
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}
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#ifdef CONFIG_HAS_DMA
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#include <asm/dma-mapping.h>
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#else
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#include <asm-generic/dma-mapping-broken.h>
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#endif
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/* Backwards compat, remove in 2.7.x */
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#define dma_sync_single dma_sync_single_for_cpu
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#define dma_sync_sg dma_sync_sg_for_cpu
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extern u64 dma_get_required_mask(struct device *dev);
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static inline unsigned int dma_get_max_seg_size(struct device *dev)
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{
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return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
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}
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static inline unsigned int dma_set_max_seg_size(struct device *dev,
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unsigned int size)
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{
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if (dev->dma_parms) {
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dev->dma_parms->max_segment_size = size;
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return 0;
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} else
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return -EIO;
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}
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static inline unsigned long dma_get_seg_boundary(struct device *dev)
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{
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return dev->dma_parms ?
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dev->dma_parms->segment_boundary_mask : 0xffffffff;
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}
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static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
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{
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if (dev->dma_parms) {
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dev->dma_parms->segment_boundary_mask = mask;
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return 0;
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} else
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return -EIO;
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}
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/* flags for the coherent memory api */
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#define DMA_MEMORY_MAP 0x01
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#define DMA_MEMORY_IO 0x02
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#define DMA_MEMORY_INCLUDES_CHILDREN 0x04
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#define DMA_MEMORY_EXCLUSIVE 0x08
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#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
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static inline int
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dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
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dma_addr_t device_addr, size_t size, int flags)
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{
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return 0;
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}
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static inline void
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dma_release_declared_memory(struct device *dev)
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{
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}
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static inline void *
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dma_mark_declared_memory_occupied(struct device *dev,
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dma_addr_t device_addr, size_t size)
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{
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return ERR_PTR(-EBUSY);
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}
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#endif
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/*
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* Managed DMA API
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*/
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extern void *dmam_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp);
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extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle);
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extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp);
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extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle);
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#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
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extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
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dma_addr_t device_addr, size_t size,
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int flags);
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extern void dmam_release_declared_memory(struct device *dev);
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#else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
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static inline int dmam_declare_coherent_memory(struct device *dev,
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dma_addr_t bus_addr, dma_addr_t device_addr,
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size_t size, gfp_t gfp)
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{
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return 0;
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}
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static inline void dmam_release_declared_memory(struct device *dev)
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{
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}
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#endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
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#endif
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