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004ea683d9
This patch adds support to the RGMII handler in the EMAC driver for the MII PHY mode such that device tree entries of the form `phy-mode = "mii";' are recognized and handled appropriately. While logically, in software, "gmii" and "mii" modes are the same, they are wired differently, so it makes sense to allow DTS authors to specify each explicitly. Signed-off-by: Grant Erickson <gerickson@nuovations.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
336 lines
7.7 KiB
C
336 lines
7.7 KiB
C
/*
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* drivers/net/ibm_newemac/rgmii.c
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*
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* Driver for PowerPC 4xx on-chip ethernet controller, RGMII bridge support.
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*
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* Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
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* <benh@kernel.crashing.org>
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*
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* Based on the arch/ppc version of the driver:
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*
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* Copyright (c) 2004, 2005 Zultys Technologies.
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* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
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*
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* Based on original work by
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* Matt Porter <mporter@kernel.crashing.org>
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* Copyright 2004 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/ethtool.h>
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#include <asm/io.h>
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#include "emac.h"
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#include "debug.h"
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// XXX FIXME: Axon seems to support a subset of the RGMII, we
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// thus need to take that into account and possibly change some
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// of the bit settings below that don't seem to quite match the
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// AXON spec
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/* RGMIIx_FER */
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#define RGMII_FER_MASK(idx) (0x7 << ((idx) * 4))
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#define RGMII_FER_RTBI(idx) (0x4 << ((idx) * 4))
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#define RGMII_FER_RGMII(idx) (0x5 << ((idx) * 4))
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#define RGMII_FER_TBI(idx) (0x6 << ((idx) * 4))
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#define RGMII_FER_GMII(idx) (0x7 << ((idx) * 4))
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#define RGMII_FER_MII(idx) RGMII_FER_GMII(idx)
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/* RGMIIx_SSR */
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#define RGMII_SSR_MASK(idx) (0x7 << ((idx) * 8))
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#define RGMII_SSR_100(idx) (0x2 << ((idx) * 8))
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#define RGMII_SSR_1000(idx) (0x4 << ((idx) * 8))
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/* RGMII bridge supports only GMII/TBI and RGMII/RTBI PHYs */
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static inline int rgmii_valid_mode(int phy_mode)
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{
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return phy_mode == PHY_MODE_GMII ||
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phy_mode == PHY_MODE_MII ||
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phy_mode == PHY_MODE_RGMII ||
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phy_mode == PHY_MODE_TBI ||
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phy_mode == PHY_MODE_RTBI;
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}
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static inline const char *rgmii_mode_name(int mode)
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{
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switch (mode) {
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case PHY_MODE_RGMII:
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return "RGMII";
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case PHY_MODE_TBI:
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return "TBI";
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case PHY_MODE_GMII:
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return "GMII";
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case PHY_MODE_MII:
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return "MII";
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case PHY_MODE_RTBI:
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return "RTBI";
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default:
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BUG();
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}
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}
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static inline u32 rgmii_mode_mask(int mode, int input)
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{
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switch (mode) {
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case PHY_MODE_RGMII:
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return RGMII_FER_RGMII(input);
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case PHY_MODE_TBI:
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return RGMII_FER_TBI(input);
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case PHY_MODE_GMII:
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return RGMII_FER_GMII(input);
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case PHY_MODE_MII:
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return RGMII_FER_MII(input);
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case PHY_MODE_RTBI:
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return RGMII_FER_RTBI(input);
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default:
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BUG();
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}
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}
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int __devinit rgmii_attach(struct of_device *ofdev, int input, int mode)
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{
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struct rgmii_instance *dev = dev_get_drvdata(&ofdev->dev);
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struct rgmii_regs __iomem *p = dev->base;
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RGMII_DBG(dev, "attach(%d)" NL, input);
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/* Check if we need to attach to a RGMII */
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if (input < 0 || !rgmii_valid_mode(mode)) {
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printk(KERN_ERR "%s: unsupported settings !\n",
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ofdev->node->full_name);
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return -ENODEV;
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}
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mutex_lock(&dev->lock);
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/* Enable this input */
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out_be32(&p->fer, in_be32(&p->fer) | rgmii_mode_mask(mode, input));
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printk(KERN_NOTICE "%s: input %d in %s mode\n",
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ofdev->node->full_name, input, rgmii_mode_name(mode));
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++dev->users;
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mutex_unlock(&dev->lock);
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return 0;
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}
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void rgmii_set_speed(struct of_device *ofdev, int input, int speed)
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{
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struct rgmii_instance *dev = dev_get_drvdata(&ofdev->dev);
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struct rgmii_regs __iomem *p = dev->base;
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u32 ssr;
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mutex_lock(&dev->lock);
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ssr = in_be32(&p->ssr) & ~RGMII_SSR_MASK(input);
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RGMII_DBG(dev, "speed(%d, %d)" NL, input, speed);
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if (speed == SPEED_1000)
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ssr |= RGMII_SSR_1000(input);
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else if (speed == SPEED_100)
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ssr |= RGMII_SSR_100(input);
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out_be32(&p->ssr, ssr);
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mutex_unlock(&dev->lock);
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}
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void rgmii_get_mdio(struct of_device *ofdev, int input)
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{
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struct rgmii_instance *dev = dev_get_drvdata(&ofdev->dev);
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struct rgmii_regs __iomem *p = dev->base;
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u32 fer;
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RGMII_DBG2(dev, "get_mdio(%d)" NL, input);
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if (!(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO))
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return;
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mutex_lock(&dev->lock);
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fer = in_be32(&p->fer);
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fer |= 0x00080000u >> input;
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out_be32(&p->fer, fer);
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(void)in_be32(&p->fer);
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DBG2(dev, " fer = 0x%08x\n", fer);
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}
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void rgmii_put_mdio(struct of_device *ofdev, int input)
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{
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struct rgmii_instance *dev = dev_get_drvdata(&ofdev->dev);
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struct rgmii_regs __iomem *p = dev->base;
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u32 fer;
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RGMII_DBG2(dev, "put_mdio(%d)" NL, input);
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if (!(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO))
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return;
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fer = in_be32(&p->fer);
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fer &= ~(0x00080000u >> input);
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out_be32(&p->fer, fer);
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(void)in_be32(&p->fer);
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DBG2(dev, " fer = 0x%08x\n", fer);
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mutex_unlock(&dev->lock);
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}
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void rgmii_detach(struct of_device *ofdev, int input)
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{
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struct rgmii_instance *dev = dev_get_drvdata(&ofdev->dev);
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struct rgmii_regs __iomem *p = dev->base;
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mutex_lock(&dev->lock);
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BUG_ON(!dev || dev->users == 0);
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RGMII_DBG(dev, "detach(%d)" NL, input);
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/* Disable this input */
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out_be32(&p->fer, in_be32(&p->fer) & ~RGMII_FER_MASK(input));
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--dev->users;
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mutex_unlock(&dev->lock);
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}
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int rgmii_get_regs_len(struct of_device *ofdev)
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{
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return sizeof(struct emac_ethtool_regs_subhdr) +
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sizeof(struct rgmii_regs);
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}
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void *rgmii_dump_regs(struct of_device *ofdev, void *buf)
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{
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struct rgmii_instance *dev = dev_get_drvdata(&ofdev->dev);
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struct emac_ethtool_regs_subhdr *hdr = buf;
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struct rgmii_regs *regs = (struct rgmii_regs *)(hdr + 1);
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hdr->version = 0;
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hdr->index = 0; /* for now, are there chips with more than one
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* rgmii ? if yes, then we'll add a cell_index
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* like we do for emac
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*/
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memcpy_fromio(regs, dev->base, sizeof(struct rgmii_regs));
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return regs + 1;
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}
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static int __devinit rgmii_probe(struct of_device *ofdev,
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const struct of_device_id *match)
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{
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struct device_node *np = ofdev->node;
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struct rgmii_instance *dev;
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struct resource regs;
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int rc;
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rc = -ENOMEM;
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dev = kzalloc(sizeof(struct rgmii_instance), GFP_KERNEL);
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if (dev == NULL) {
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printk(KERN_ERR "%s: could not allocate RGMII device!\n",
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np->full_name);
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goto err_gone;
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}
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mutex_init(&dev->lock);
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dev->ofdev = ofdev;
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rc = -ENXIO;
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if (of_address_to_resource(np, 0, ®s)) {
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printk(KERN_ERR "%s: Can't get registers address\n",
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np->full_name);
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goto err_free;
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}
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rc = -ENOMEM;
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dev->base = (struct rgmii_regs __iomem *)ioremap(regs.start,
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sizeof(struct rgmii_regs));
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if (dev->base == NULL) {
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printk(KERN_ERR "%s: Can't map device registers!\n",
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np->full_name);
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goto err_free;
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}
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/* Check for RGMII flags */
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if (of_get_property(ofdev->node, "has-mdio", NULL))
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dev->flags |= EMAC_RGMII_FLAG_HAS_MDIO;
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/* CAB lacks the right properties, fix this up */
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if (of_device_is_compatible(ofdev->node, "ibm,rgmii-axon"))
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dev->flags |= EMAC_RGMII_FLAG_HAS_MDIO;
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DBG2(dev, " Boot FER = 0x%08x, SSR = 0x%08x\n",
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in_be32(&dev->base->fer), in_be32(&dev->base->ssr));
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/* Disable all inputs by default */
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out_be32(&dev->base->fer, 0);
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printk(KERN_INFO
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"RGMII %s initialized with%s MDIO support\n",
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ofdev->node->full_name,
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(dev->flags & EMAC_RGMII_FLAG_HAS_MDIO) ? "" : "out");
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wmb();
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dev_set_drvdata(&ofdev->dev, dev);
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return 0;
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err_free:
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kfree(dev);
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err_gone:
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return rc;
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}
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static int __devexit rgmii_remove(struct of_device *ofdev)
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{
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struct rgmii_instance *dev = dev_get_drvdata(&ofdev->dev);
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dev_set_drvdata(&ofdev->dev, NULL);
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WARN_ON(dev->users != 0);
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iounmap(dev->base);
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kfree(dev);
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return 0;
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}
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static struct of_device_id rgmii_match[] =
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{
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{
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.compatible = "ibm,rgmii",
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},
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{
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.type = "emac-rgmii",
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},
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{},
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};
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static struct of_platform_driver rgmii_driver = {
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.name = "emac-rgmii",
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.match_table = rgmii_match,
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.probe = rgmii_probe,
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.remove = rgmii_remove,
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};
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int __init rgmii_init(void)
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{
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return of_register_platform_driver(&rgmii_driver);
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}
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void rgmii_exit(void)
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{
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of_unregister_platform_driver(&rgmii_driver);
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}
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