Jerome Brunet e988aae54c clk: meson8b: put dividers and muxes in tables ... Until now, there was only 1 divider and 1 mux declared for the meson8b platform. With the ongoing work on various system, including audio, this is about to change. Use the same approach as gates for dividers and muxes, putting them in tables to fix the register address at runtime. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20170309104154.28295-4-jbrunet@baylibre.com		2017-03-27 12:30:01 -07:00
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clk-cpu.c	clk: meson8b: clean up cpu clocks	2016-06-22 18:02:35 -07:00
clk-mpll.c	clk: meson: add mpll support	2016-06-22 18:02:59 -07:00
clk-pll.c	clk: meson: fractional pll support	2016-06-22 18:05:47 -07:00
clkc.h	clk: meson: fix SET_PARM macro	2017-03-27 12:29:51 -07:00
gxbb-aoclk.c	clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()	2016-08-24 00:55:13 -07:00
gxbb.c	clk: meson: add missing const qualifiers on gate arrays	2017-03-27 12:29:55 -07:00
gxbb.h	clk: gxbb: fix CLKID_ETH defined twice	2017-01-27 10:56:57 -08:00
Kconfig	clk: gxbb: add AmLogic GXBB clk controller driver	2016-06-22 18:07:31 -07:00
Makefile	clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention	2016-09-01 17:31:44 -07:00
meson8b.c	clk: meson8b: put dividers and muxes in tables	2017-03-27 12:30:01 -07:00
meson8b.h	meson: clk: Add support for clock gates	2016-09-01 17:43:12 -07:00