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1618fdd960
Make sure that we have access to the performance counters and that they aren't being used by perf events or anything else. Cc: Will Deacon <will.deacon@arm.com> Cc: Jean Pihet <jpihet@mvista.com> Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
79 lines
1.6 KiB
C
79 lines
1.6 KiB
C
/**
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* @file op_model_v6.c
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* ARM11 Performance Monitor Driver
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*
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* Based on op_model_xscale.c
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*
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* @remark Copyright 2000-2004 Deepak Saxena <dsaxena@mvista.com>
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* @remark Copyright 2000-2004 MontaVista Software Inc
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* @remark Copyright 2004 Dave Jiang <dave.jiang@intel.com>
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* @remark Copyright 2004 Intel Corporation
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* @remark Copyright 2004 Zwane Mwaikambo <zwane@arm.linux.org.uk>
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* @remark Copyright 2004 OProfile Authors
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*
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* @remark Read the file COPYING
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*
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* @author Tony Lindgren <tony@atomide.com>
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*/
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/* #define DEBUG */
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/sched.h>
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#include <linux/oprofile.h>
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#include <linux/interrupt.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <asm/pmu.h>
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#include "op_counter.h"
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#include "op_arm_model.h"
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#include "op_model_arm11_core.h"
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static const struct pmu_irqs *pmu_irqs;
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static void armv6_pmu_stop(void)
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{
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arm11_stop_pmu();
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arm11_release_interrupts(pmu_irqs->irqs, pmu_irqs->num_irqs);
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release_pmu(pmu_irqs);
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pmu_irqs = NULL;
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}
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static int armv6_pmu_start(void)
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{
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int ret;
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pmu_irqs = reserve_pmu();
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if (IS_ERR(pmu_irqs)) {
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ret = PTR_ERR(pmu_irqs);
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goto out;
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}
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ret = arm11_request_interrupts(pmu_irqs->irqs, pmu_irqs->num_irqs);
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if (ret >= 0) {
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ret = arm11_start_pmu();
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} else {
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release_pmu(pmu_irqs);
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pmu_irqs = NULL;
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}
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out:
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return ret;
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}
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static int armv6_detect_pmu(void)
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{
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return 0;
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}
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struct op_arm_model_spec op_armv6_spec = {
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.init = armv6_detect_pmu,
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.num_counters = 3,
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.setup_ctrs = arm11_setup_pmu,
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.start = armv6_pmu_start,
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.stop = armv6_pmu_stop,
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.name = "arm/armv6",
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};
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