Masahiro Yamada e7ecbc057b ARM: uniphier: add outer cache support ... This commit adds support for UniPhier outer cache controller. All the UniPhier SoCs are equipped with the L2 cache, while the L3 cache is currently only integrated on PH1-Pro5 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net>		2015-10-27 09:20:50 +09:00
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asm	ARM: uniphier: add outer cache support	2015-10-27 09:20:50 +09:00
debug	ARM: at91: debug: use DEBUG_UART_PHYS	2015-09-21 16:31:15 +02:00
uapi/asm	ARM: wire up new syscalls	2015-09-22 08:13:42 +01:00