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https://github.com/edk2-porting/linux-next.git
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53631b54c8
This patch adds support for FP/ASIMD register bank saving and restoring during context switch and FP exception handling to generate SIGFPE. There are 32 128-bit registers and the context switching is currently done non-lazily. Benchmarks on real hardware are required before implementing lazy FP state saving/restoring. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
107 lines
2.5 KiB
C
107 lines
2.5 KiB
C
/*
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* FP/SIMD context switching and fault handling
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*
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* Copyright (C) 2012 ARM Ltd.
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* Author: Catalin Marinas <catalin.marinas@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/signal.h>
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#include <asm/fpsimd.h>
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#include <asm/cputype.h>
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#define FPEXC_IOF (1 << 0)
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#define FPEXC_DZF (1 << 1)
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#define FPEXC_OFF (1 << 2)
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#define FPEXC_UFF (1 << 3)
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#define FPEXC_IXF (1 << 4)
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#define FPEXC_IDF (1 << 7)
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/*
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* Trapped FP/ASIMD access.
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*/
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void do_fpsimd_acc(unsigned int esr, struct pt_regs *regs)
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{
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/* TODO: implement lazy context saving/restoring */
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WARN_ON(1);
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}
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/*
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* Raise a SIGFPE for the current process.
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*/
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void do_fpsimd_exc(unsigned int esr, struct pt_regs *regs)
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{
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siginfo_t info;
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unsigned int si_code = 0;
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if (esr & FPEXC_IOF)
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si_code = FPE_FLTINV;
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else if (esr & FPEXC_DZF)
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si_code = FPE_FLTDIV;
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else if (esr & FPEXC_OFF)
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si_code = FPE_FLTOVF;
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else if (esr & FPEXC_UFF)
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si_code = FPE_FLTUND;
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else if (esr & FPEXC_IXF)
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si_code = FPE_FLTRES;
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memset(&info, 0, sizeof(info));
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info.si_signo = SIGFPE;
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info.si_code = si_code;
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info.si_addr = (void __user *)instruction_pointer(regs);
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send_sig_info(SIGFPE, &info, current);
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}
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void fpsimd_thread_switch(struct task_struct *next)
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{
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/* check if not kernel threads */
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if (current->mm)
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fpsimd_save_state(¤t->thread.fpsimd_state);
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if (next->mm)
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fpsimd_load_state(&next->thread.fpsimd_state);
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}
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void fpsimd_flush_thread(void)
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{
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memset(¤t->thread.fpsimd_state, 0, sizeof(struct fpsimd_state));
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fpsimd_load_state(¤t->thread.fpsimd_state);
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}
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/*
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* FP/SIMD support code initialisation.
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*/
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static int __init fpsimd_init(void)
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{
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u64 pfr = read_cpuid(ID_AA64PFR0_EL1);
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if (pfr & (0xf << 16)) {
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pr_notice("Floating-point is not implemented\n");
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return 0;
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}
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elf_hwcap |= HWCAP_FP;
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if (pfr & (0xf << 20))
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pr_notice("Advanced SIMD is not implemented\n");
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else
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elf_hwcap |= HWCAP_ASIMD;
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return 0;
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}
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late_initcall(fpsimd_init);
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