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The OCTEON is a MIPS64 based SOC family with an on chip watchdog unit. The driver is split into two source files one for the C code and one for assembly. Assembly is needed to handle the NMI and then print the machine state before the reboot is triggered. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Tony Lindgren <tony@atomide.com> Cc: Marc Zyngier <maz@misterjones.org> Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Sam Ravnborg <sam@ravnborg.org> To: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org, Patchwork: https://patchwork.linux-mips.org/patch/1503/ Signed-off-by: Wim Van Sebroeck <wim@iguana.be> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 drivers/watchdog/octeon-wdt-main.c create mode 100644 drivers/watchdog/octeon-wdt-nmi.S
65 lines
1.3 KiB
ArmAsm
65 lines
1.3 KiB
ArmAsm
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2007 Cavium Networks
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*/
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#include <asm/asm.h>
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#include <asm/regdef.h>
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#define SAVE_REG(r) sd $r, -32768+6912-(32-r)*8($0)
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NESTED(octeon_wdt_nmi_stage2, 0, sp)
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.set push
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.set noreorder
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.set noat
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/* Save all registers to the top CVMSEG. This shouldn't
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* corrupt any state used by the kernel. Also all registers
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* should have the value right before the NMI. */
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SAVE_REG(0)
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SAVE_REG(1)
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SAVE_REG(2)
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SAVE_REG(3)
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SAVE_REG(4)
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SAVE_REG(5)
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SAVE_REG(6)
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SAVE_REG(7)
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SAVE_REG(8)
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SAVE_REG(9)
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SAVE_REG(10)
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SAVE_REG(11)
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SAVE_REG(12)
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SAVE_REG(13)
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SAVE_REG(14)
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SAVE_REG(15)
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SAVE_REG(16)
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SAVE_REG(17)
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SAVE_REG(18)
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SAVE_REG(19)
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SAVE_REG(20)
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SAVE_REG(21)
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SAVE_REG(22)
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SAVE_REG(23)
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SAVE_REG(24)
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SAVE_REG(25)
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SAVE_REG(26)
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SAVE_REG(27)
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SAVE_REG(28)
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SAVE_REG(29)
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SAVE_REG(30)
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SAVE_REG(31)
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/* Set the stack to begin right below the registers */
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li sp, -32768+6912-32*8
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/* Load the address of the third stage handler */
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dla a0, octeon_wdt_nmi_stage3
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/* Call the third stage handler */
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jal a0
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/* a0 is the address of the saved registers */
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move a0, sp
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/* Loop forvever if we get here. */
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1: b 1b
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nop
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.set pop
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END(octeon_wdt_nmi_stage2)
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