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linux-next/drivers/clk/tegra
Andrew Bresticker 15d68e8c2e clk: tegra: Initialize UTMI PLL when enabling PLLU
Move the UTMI PLL initialization code form clk-tegra<chip>.c files into
clk-pll.c. UTMI PLL was being configured and set in HW control right
after registration. However, when the clock init_table is processed and
child clks of PLLU are enabled, it will call in and enable PLLU as
well, and initiate SW enabling sequence even though PLLU is already in
HW control. This leads to getting UTMIPLL stuck with a SEQ_BUSY status.

Doing the initialization once during pllu_enable means we configure it
properly into HW control.

A side effect of the commonization/localization of the UTMI PLL init
code, is that it corrects some errors that were present for earlier
generations. For instance, in clk-tegra124.c, it used to have:

    #define UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(x) (((x) & 0x1f) << 6)

when the correct shift to use is present in the new version:

    #define UTMIP_PLL_CFG1_ENABLE_DLY_COUNT(x) (((x) & 0x1f) << 27)

which matches the Tegra124 TRM register definition.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
[rklein: Merged in some later fixes for potential deadlocks]
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
[treding: coding style bike-shedding, remove unused variable]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-06-30 17:43:17 +02:00
..
clk-audio-sync.c clk: tegra: Remove CLK_IS_ROOT 2016-03-02 17:47:19 -08:00
clk-dfll.c clk: tegra: dfll: Reference CVB table instead of copying data 2016-04-28 12:41:53 +02:00
clk-dfll.h clk: tegra: dfll: Properly clean up on failure and removal 2016-04-28 12:41:54 +02:00
clk-divider.c tegra/clk-divider: fix wrong do_div() usage 2015-11-16 12:37:55 -05:00
clk-emc.c clk: tegra: Add missing of_node_put() 2016-02-02 15:49:28 +01:00
clk-id.h clk: tegra: Squash sor1 safe/brick/src into a single mux 2016-06-17 17:24:09 +02:00
clk-periph-fixed.c clk: tegra: Add fixed factor peripheral clock type 2016-04-28 12:41:47 +02:00
clk-periph-gate.c clk: tegra: Constify peripheral clock registers 2016-04-28 12:41:45 +02:00
clk-periph.c clk: tegra: Constify peripheral clock registers 2016-04-28 12:41:45 +02:00
clk-pll-out.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-pll.c clk: tegra: Initialize UTMI PLL when enabling PLLU 2016-06-30 17:43:17 +02:00
clk-super.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra20.c treewide: Fix typos in printk 2016-04-28 10:52:28 +02:00
clk-tegra30.c clk: tegra: Initialize UTMI PLL when enabling PLLU 2016-06-30 17:43:17 +02:00
clk-tegra114.c clk: tegra: Initialize UTMI PLL when enabling PLLU 2016-06-30 17:43:17 +02:00
clk-tegra124-dfll-fcpu.c clk: tegra: dfll: Reformat CVB frequency table 2016-04-28 12:41:54 +02:00
clk-tegra124.c clk: tegra: Initialize UTMI PLL when enabling PLLU 2016-06-30 17:43:17 +02:00
clk-tegra210.c clk: tegra: Initialize UTMI PLL when enabling PLLU 2016-06-30 17:43:17 +02:00
clk-tegra-audio.c clk: tegra: Modify tegra_audio_clk_init to accept more plls 2015-10-20 13:56:55 +02:00
clk-tegra-fixed.c clk: tegra: Remove trailing blank line 2016-04-28 12:41:45 +02:00
clk-tegra-periph.c clk: tegra: Mark timer clock as critical 2016-06-22 13:46:52 +02:00
clk-tegra-pmc.c clk: tegra: Properly include clk.h 2015-07-20 11:11:17 -07:00
clk-tegra-super-gen4.c clk: tegra: super: Fix sparse warnings for functions not declared as static 2016-02-02 15:49:34 +01:00
clk.c clk: tegra: Changes for v4.7-rc1 2016-05-02 16:53:02 -07:00
clk.h clk: tegra: Initialize UTMI PLL when enabling PLLU 2016-06-30 17:43:17 +02:00
cvb.c clk: tegra: dfll: Properly clean up on failure and removal 2016-04-28 12:41:54 +02:00
cvb.h clk: tegra: dfll: Properly clean up on failure and removal 2016-04-28 12:41:54 +02:00
Kconfig clk: tegra: EMC clock driver depends on EMC driver 2015-05-13 15:17:13 +02:00
Makefile clk: tegra: Add fixed factor peripheral clock type 2016-04-28 12:41:47 +02:00