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e172800e5d
asm-generic/rwsem.h used to live under arch/powerpc. During its liberation to common code, a few references to its former home where preserved, in particular the definition of RWSEM_ACTIVE_MASK is predicated on CONFIG_PPC64. This patch updates the ifdefs and comments to architecturally neutral versions. Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Richard Kuo <rkuo@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
133 lines
2.9 KiB
C
133 lines
2.9 KiB
C
#ifndef _ASM_GENERIC_RWSEM_H
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#define _ASM_GENERIC_RWSEM_H
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#ifndef _LINUX_RWSEM_H
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#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
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#endif
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#ifdef __KERNEL__
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/*
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* R/W semaphores originally for PPC using the stuff in lib/rwsem.c.
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* Adapted largely from include/asm-i386/rwsem.h
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* by Paul Mackerras <paulus@samba.org>.
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*/
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/*
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* the semaphore definition
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*/
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#ifdef CONFIG_64BIT
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# define RWSEM_ACTIVE_MASK 0xffffffffL
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#else
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# define RWSEM_ACTIVE_MASK 0x0000ffffL
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#endif
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#define RWSEM_UNLOCKED_VALUE 0x00000000L
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#define RWSEM_ACTIVE_BIAS 0x00000001L
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#define RWSEM_WAITING_BIAS (-RWSEM_ACTIVE_MASK-1)
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#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
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#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
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/*
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* lock for reading
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*/
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static inline void __down_read(struct rw_semaphore *sem)
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{
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if (unlikely(atomic_long_inc_return((atomic_long_t *)&sem->count) <= 0))
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rwsem_down_read_failed(sem);
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}
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static inline int __down_read_trylock(struct rw_semaphore *sem)
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{
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long tmp;
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while ((tmp = sem->count) >= 0) {
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if (tmp == cmpxchg(&sem->count, tmp,
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tmp + RWSEM_ACTIVE_READ_BIAS)) {
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return 1;
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}
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}
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return 0;
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}
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/*
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* lock for writing
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*/
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static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
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{
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long tmp;
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tmp = atomic_long_add_return(RWSEM_ACTIVE_WRITE_BIAS,
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(atomic_long_t *)&sem->count);
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if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS))
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rwsem_down_write_failed(sem);
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}
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static inline void __down_write(struct rw_semaphore *sem)
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{
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__down_write_nested(sem, 0);
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}
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static inline int __down_write_trylock(struct rw_semaphore *sem)
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{
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long tmp;
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tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
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RWSEM_ACTIVE_WRITE_BIAS);
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return tmp == RWSEM_UNLOCKED_VALUE;
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}
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/*
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* unlock after reading
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*/
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static inline void __up_read(struct rw_semaphore *sem)
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{
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long tmp;
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tmp = atomic_long_dec_return((atomic_long_t *)&sem->count);
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if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0))
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rwsem_wake(sem);
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}
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/*
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* unlock after writing
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*/
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static inline void __up_write(struct rw_semaphore *sem)
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{
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if (unlikely(atomic_long_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
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(atomic_long_t *)&sem->count) < 0))
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rwsem_wake(sem);
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}
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/*
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* implement atomic add functionality
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*/
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static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
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{
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atomic_long_add(delta, (atomic_long_t *)&sem->count);
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}
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/*
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* downgrade write lock to read lock
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*/
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static inline void __downgrade_write(struct rw_semaphore *sem)
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{
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long tmp;
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tmp = atomic_long_add_return(-RWSEM_WAITING_BIAS,
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(atomic_long_t *)&sem->count);
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if (tmp < 0)
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rwsem_downgrade_wake(sem);
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}
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/*
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* implement exchange and add functionality
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*/
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static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
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{
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return atomic_long_add_return(delta, (atomic_long_t *)&sem->count);
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}
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#endif /* __KERNEL__ */
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#endif /* _ASM_GENERIC_RWSEM_H */
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