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There are a number of situations where the mandatory barriers rmb() and wmb() are used to order memory/memory operations in the device drivers and those barriers are much heavier than they actually need to be. For example in the case of PowerPC wmb() calls the heavy-weight sync instruction when for coherent memory operations all that is really needed is an lsync or eieio instruction. This commit adds a coherent only version of the mandatory memory barriers rmb() and wmb(). In most cases this should result in the barrier being the same as the SMP barriers for the SMP case, however in some cases we use a barrier that is somewhere in between rmb() and smp_rmb(). For example on ARM the rmb barriers break down as follows: Barrier Call Explanation --------- -------- ---------------------------------- rmb() dsb() Data synchronization barrier - system dma_rmb() dmb(osh) data memory barrier - outer sharable smp_rmb() dmb(ish) data memory barrier - inner sharable These new barriers are not as safe as the standard rmb() and wmb(). Specifically they do not guarantee ordering between coherent and incoherent memories. The primary use case for these would be to enforce ordering of reads and writes when accessing coherent memory that is shared between the CPU and a device. It may also be noted that there is no dma_mb(). Most architectures don't provide a good mechanism for performing a coherent only full barrier without resorting to the same mechanism used in mb(). As such there isn't much to be gained in trying to define such a function. Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: Michael Ellerman <michael@ellerman.id.au> Cc: Michael Neuling <mikey@neuling.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ingo Molnar <mingo@kernel.org> Cc: David Miller <davem@davemloft.net> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Alexander Duyck <alexander.h.duyck@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
98 lines
2.1 KiB
C
98 lines
2.1 KiB
C
/*
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* Generic barrier definitions, originally based on MN10300 definitions.
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*
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* It should be possible to use these on really simple architectures,
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* but it serves more as a starting point for new ports.
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef __ASM_GENERIC_BARRIER_H
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#define __ASM_GENERIC_BARRIER_H
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#ifndef __ASSEMBLY__
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#include <linux/compiler.h>
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#ifndef nop
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#define nop() asm volatile ("nop")
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#endif
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/*
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* Force strict CPU ordering. And yes, this is required on UP too when we're
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* talking to devices.
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*
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* Fall back to compiler barriers if nothing better is provided.
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*/
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#ifndef mb
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#define mb() barrier()
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#endif
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#ifndef rmb
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#define rmb() mb()
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#endif
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#ifndef wmb
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#define wmb() mb()
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#endif
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#ifndef dma_rmb
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#define dma_rmb() rmb()
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#endif
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#ifndef dma_wmb
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#define dma_wmb() wmb()
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#endif
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#ifndef read_barrier_depends
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#define read_barrier_depends() do { } while (0)
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#endif
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#ifdef CONFIG_SMP
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#define smp_mb() mb()
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#define smp_rmb() rmb()
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#define smp_wmb() wmb()
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#define smp_read_barrier_depends() read_barrier_depends()
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#else
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#define smp_mb() barrier()
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#define smp_rmb() barrier()
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#define smp_wmb() barrier()
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#define smp_read_barrier_depends() do { } while (0)
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#endif
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#ifndef set_mb
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#define set_mb(var, value) do { (var) = (value); mb(); } while (0)
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#endif
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#ifndef smp_mb__before_atomic
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#define smp_mb__before_atomic() smp_mb()
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#endif
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#ifndef smp_mb__after_atomic
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#define smp_mb__after_atomic() smp_mb()
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#endif
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#define smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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smp_mb(); \
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ACCESS_ONCE(*p) = (v); \
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} while (0)
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#define smp_load_acquire(p) \
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({ \
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typeof(*p) ___p1 = ACCESS_ONCE(*p); \
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compiletime_assert_atomic_type(*p); \
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smp_mb(); \
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___p1; \
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})
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#endif /* !__ASSEMBLY__ */
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#endif /* __ASM_GENERIC_BARRIER_H */
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