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The current vPMU only supports Architecture Version 2. According to Intel SDM "17.4.7 Freezing LBR and Performance Counters on PMI", if IA32_DEBUGCTL.Freeze_LBR_On_PMI = 1, the LBR is frozen on the virtual PMI and the KVM would emulate to clear the LBR bit (bit 0) in IA32_DEBUGCTL. Also, guest needs to re-enable IA32_DEBUGCTL.LBR to resume recording branches. Signed-off-by: Like Xu <like.xu@linux.intel.com> Reviewed-by: Andi Kleen <ak@linux.intel.com> Message-Id: <20210201051039.255478-9-like.xu@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> |
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.. | ||
capabilities.h | ||
evmcs.c | ||
evmcs.h | ||
nested.c | ||
nested.h | ||
pmu_intel.c | ||
posted_intr.c | ||
posted_intr.h | ||
vmcs12.c | ||
vmcs12.h | ||
vmcs_shadow_fields.h | ||
vmcs.h | ||
vmenter.S | ||
vmx_ops.h | ||
vmx.c | ||
vmx.h |