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37bff2c159
Let's encourage const arrays of parent names like other basic clock types. Cc: Sergej Sawazki <ce3a@gmx.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
326 lines
8.4 KiB
C
326 lines
8.4 KiB
C
/*
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* Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
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*
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* Authors:
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* Jyri Sarha <jsarha@ti.com>
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* Sergej Sawazki <ce3a@gmx.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Gpio controlled clock implementation
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*/
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#include <linux/clk-provider.h>
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#include <linux/export.h>
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#include <linux/slab.h>
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#include <linux/gpio.h>
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#include <linux/gpio/consumer.h>
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#include <linux/of_gpio.h>
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#include <linux/err.h>
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#include <linux/device.h>
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/**
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* DOC: basic gpio gated clock which can be enabled and disabled
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* with gpio output
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* Traits of this clock:
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* prepare - clk_(un)prepare only ensures parent is (un)prepared
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* enable - clk_enable and clk_disable are functional & control gpio
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* rate - inherits rate from parent. No clk_set_rate support
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* parent - fixed parent. No clk_set_parent support
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*/
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#define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw)
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static int clk_gpio_gate_enable(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value(clk->gpiod, 1);
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return 0;
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}
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static void clk_gpio_gate_disable(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value(clk->gpiod, 0);
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}
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static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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return gpiod_get_value(clk->gpiod);
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}
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const struct clk_ops clk_gpio_gate_ops = {
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.enable = clk_gpio_gate_enable,
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.disable = clk_gpio_gate_disable,
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.is_enabled = clk_gpio_gate_is_enabled,
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};
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EXPORT_SYMBOL_GPL(clk_gpio_gate_ops);
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/**
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* DOC: basic clock multiplexer which can be controlled with a gpio output
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* Traits of this clock:
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* prepare - clk_prepare only ensures that parents are prepared
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* rate - rate is only affected by parent switching. No clk_set_rate support
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* parent - parent is adjustable through clk_set_parent
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*/
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static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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return gpiod_get_value(clk->gpiod);
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}
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static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
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{
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struct clk_gpio *clk = to_clk_gpio(hw);
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gpiod_set_value(clk->gpiod, index);
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return 0;
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}
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const struct clk_ops clk_gpio_mux_ops = {
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.get_parent = clk_gpio_mux_get_parent,
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.set_parent = clk_gpio_mux_set_parent,
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.determine_rate = __clk_mux_determine_rate,
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};
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EXPORT_SYMBOL_GPL(clk_gpio_mux_ops);
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static struct clk *clk_register_gpio(struct device *dev, const char *name,
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const char * const *parent_names, u8 num_parents, unsigned gpio,
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bool active_low, unsigned long flags,
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const struct clk_ops *clk_gpio_ops)
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{
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struct clk_gpio *clk_gpio;
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struct clk *clk;
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struct clk_init_data init = {};
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unsigned long gpio_flags;
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int err;
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if (dev)
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clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
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else
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clk_gpio = kzalloc(sizeof(*clk_gpio), GFP_KERNEL);
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if (!clk_gpio)
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return ERR_PTR(-ENOMEM);
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if (active_low)
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gpio_flags = GPIOF_ACTIVE_LOW | GPIOF_OUT_INIT_HIGH;
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else
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gpio_flags = GPIOF_OUT_INIT_LOW;
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if (dev)
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err = devm_gpio_request_one(dev, gpio, gpio_flags, name);
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else
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err = gpio_request_one(gpio, gpio_flags, name);
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if (err) {
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if (err != -EPROBE_DEFER)
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pr_err("%s: %s: Error requesting clock control gpio %u\n",
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__func__, name, gpio);
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if (!dev)
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kfree(clk_gpio);
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return ERR_PTR(err);
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}
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init.name = name;
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init.ops = clk_gpio_ops;
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init.flags = flags | CLK_IS_BASIC;
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init.parent_names = parent_names;
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init.num_parents = num_parents;
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clk_gpio->gpiod = gpio_to_desc(gpio);
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clk_gpio->hw.init = &init;
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if (dev)
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clk = devm_clk_register(dev, &clk_gpio->hw);
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else
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clk = clk_register(NULL, &clk_gpio->hw);
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if (!IS_ERR(clk))
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return clk;
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if (!dev) {
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gpiod_put(clk_gpio->gpiod);
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kfree(clk_gpio);
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}
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return clk;
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}
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/**
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* clk_register_gpio_gate - register a gpio clock gate with the clock framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @parent_name: name of this clock's parent
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* @gpio: gpio number to gate this clock
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* @active_low: true if gpio should be set to 0 to enable clock
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* @flags: clock flags
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*/
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struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
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const char *parent_name, unsigned gpio, bool active_low,
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unsigned long flags)
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{
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return clk_register_gpio(dev, name,
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(parent_name ? &parent_name : NULL),
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(parent_name ? 1 : 0), gpio, active_low, flags,
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&clk_gpio_gate_ops);
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}
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EXPORT_SYMBOL_GPL(clk_register_gpio_gate);
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/**
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* clk_register_gpio_mux - register a gpio clock mux with the clock framework
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* @dev: device that is registering this clock
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* @name: name of this clock
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* @parent_names: names of this clock's parents
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* @num_parents: number of parents listed in @parent_names
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* @gpio: gpio number to gate this clock
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* @active_low: true if gpio should be set to 0 to enable clock
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* @flags: clock flags
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*/
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struct clk *clk_register_gpio_mux(struct device *dev, const char *name,
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const char * const *parent_names, u8 num_parents, unsigned gpio,
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bool active_low, unsigned long flags)
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{
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if (num_parents != 2) {
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pr_err("mux-clock %s must have 2 parents\n", name);
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return ERR_PTR(-EINVAL);
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}
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return clk_register_gpio(dev, name, parent_names, num_parents,
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gpio, active_low, flags, &clk_gpio_mux_ops);
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}
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EXPORT_SYMBOL_GPL(clk_register_gpio_mux);
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#ifdef CONFIG_OF
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/**
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* clk_register_get() has to be delayed, because -EPROBE_DEFER
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* can not be handled properly at of_clk_init() call time.
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*/
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struct clk_gpio_delayed_register_data {
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const char *gpio_name;
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struct device_node *node;
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struct mutex lock;
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struct clk *clk;
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struct clk *(*clk_register_get)(const char *name,
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const char * const *parent_names, u8 num_parents,
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unsigned gpio, bool active_low);
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};
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static struct clk *of_clk_gpio_delayed_register_get(
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struct of_phandle_args *clkspec, void *_data)
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{
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struct clk_gpio_delayed_register_data *data = _data;
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struct clk *clk;
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const char **parent_names;
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int i, num_parents;
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int gpio;
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enum of_gpio_flags of_flags;
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mutex_lock(&data->lock);
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if (data->clk) {
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mutex_unlock(&data->lock);
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return data->clk;
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}
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gpio = of_get_named_gpio_flags(data->node, data->gpio_name, 0,
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&of_flags);
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if (gpio < 0) {
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mutex_unlock(&data->lock);
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if (gpio == -EPROBE_DEFER)
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pr_debug("%s: %s: GPIOs not yet available, retry later\n",
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data->node->name, __func__);
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else
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pr_err("%s: %s: Can't get '%s' DT property\n",
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data->node->name, __func__,
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data->gpio_name);
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return ERR_PTR(gpio);
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}
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num_parents = of_clk_get_parent_count(data->node);
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parent_names = kcalloc(num_parents, sizeof(char *), GFP_KERNEL);
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if (!parent_names) {
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clk = ERR_PTR(-ENOMEM);
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goto out;
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}
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for (i = 0; i < num_parents; i++)
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parent_names[i] = of_clk_get_parent_name(data->node, i);
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clk = data->clk_register_get(data->node->name, parent_names,
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num_parents, gpio, of_flags & OF_GPIO_ACTIVE_LOW);
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if (IS_ERR(clk))
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goto out;
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data->clk = clk;
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out:
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mutex_unlock(&data->lock);
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kfree(parent_names);
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return clk;
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}
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static struct clk *of_clk_gpio_gate_delayed_register_get(const char *name,
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const char * const *parent_names, u8 num_parents,
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unsigned gpio, bool active_low)
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{
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return clk_register_gpio_gate(NULL, name, parent_names[0],
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gpio, active_low, 0);
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}
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static struct clk *of_clk_gpio_mux_delayed_register_get(const char *name,
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const char * const *parent_names, u8 num_parents, unsigned gpio,
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bool active_low)
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{
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return clk_register_gpio_mux(NULL, name, parent_names, num_parents,
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gpio, active_low, 0);
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}
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static void __init of_gpio_clk_setup(struct device_node *node,
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const char *gpio_name,
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struct clk *(*clk_register_get)(const char *name,
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const char * const *parent_names,
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u8 num_parents,
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unsigned gpio, bool active_low))
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{
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struct clk_gpio_delayed_register_data *data;
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data = kzalloc(sizeof(*data), GFP_KERNEL);
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if (!data)
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return;
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data->node = node;
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data->gpio_name = gpio_name;
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data->clk_register_get = clk_register_get;
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mutex_init(&data->lock);
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of_clk_add_provider(node, of_clk_gpio_delayed_register_get, data);
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}
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static void __init of_gpio_gate_clk_setup(struct device_node *node)
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{
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of_gpio_clk_setup(node, "enable-gpios",
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of_clk_gpio_gate_delayed_register_get);
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}
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CLK_OF_DECLARE(gpio_gate_clk, "gpio-gate-clock", of_gpio_gate_clk_setup);
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void __init of_gpio_mux_clk_setup(struct device_node *node)
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{
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of_gpio_clk_setup(node, "select-gpios",
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of_clk_gpio_mux_delayed_register_get);
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}
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CLK_OF_DECLARE(gpio_mux_clk, "gpio-mux-clock", of_gpio_mux_clk_setup);
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#endif
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