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c24cf712ac
There is no reason to use platform folder structure now. Everything is OF driven. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
70 lines
1.7 KiB
Plaintext
70 lines
1.7 KiB
Plaintext
# For a description of the syntax of this configuration file,
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# see Documentation/kbuild/kconfig-language.txt.
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#
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# Platform selection Kconfig menu for MicroBlaze targets
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#
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menu "Platform options"
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config OPT_LIB_FUNCTION
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bool "Optimalized lib function"
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default y
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help
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Allows turn on optimalized library function (memcpy and memmove).
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They are optimized by using word alignment. This will work
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fine if both source and destination are aligned on the same
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boundary. However, if they are aligned on different boundaries
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shifts will be necessary. This might result in bad performance
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on MicroBlaze systems without a barrel shifter.
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config OPT_LIB_ASM
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bool "Optimalized lib function ASM"
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depends on OPT_LIB_FUNCTION && (XILINX_MICROBLAZE0_USE_BARREL = 1)
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default n
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help
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Allows turn on optimalized library function (memcpy and memmove).
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Function are written in asm code.
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# Definitions for MICROBLAZE0
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comment "Definitions for MICROBLAZE0"
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config KERNEL_BASE_ADDR
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hex "Physical address where Linux Kernel is"
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default "0x90000000"
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help
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BASE Address for kernel
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config XILINX_MICROBLAZE0_FAMILY
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string "Targeted FPGA family"
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default "virtex5"
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config XILINX_MICROBLAZE0_USE_MSR_INSTR
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int "USE_MSR_INSTR range (0:1)"
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default 0
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config XILINX_MICROBLAZE0_USE_PCMP_INSTR
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int "USE_PCMP_INSTR range (0:1)"
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default 0
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config XILINX_MICROBLAZE0_USE_BARREL
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int "USE_BARREL range (0:1)"
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default 0
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config XILINX_MICROBLAZE0_USE_DIV
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int "USE_DIV range (0:1)"
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default 0
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config XILINX_MICROBLAZE0_USE_HW_MUL
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int "USE_HW_MUL values (0=NONE, 1=MUL32, 2=MUL64)"
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default 0
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config XILINX_MICROBLAZE0_USE_FPU
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int "USE_FPU values (0=NONE, 1=BASIC, 2=EXTENDED)"
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default 0
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config XILINX_MICROBLAZE0_HW_VER
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string "Core version number"
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default 7.10.d
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endmenu
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