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d1adcfbb52
The AMD IOMMU has two modes for generating its own interrupts.
The first is very much based on PCI MSI, and can be configured by Linux
precisely that way. But like legacy unmapped PCI MSI it's limited to
8 bits of APIC ID.
The second method does not use PCI MSI at all in hardawre, and instead
configures the INTCAPXT registers in the IOMMU directly with the APIC ID
and vector.
In the latter case, the IOMMU driver would still use pci_enable_msi(),
read back (through MMIO) the MSI message that Linux wrote to the PCI MSI
table, then swizzle those bits into the appropriate register.
Historically, this worked because__irq_compose_msi_msg() would silently
generate an invalid MSI message with the high bits of the APIC ID in the
high bits of the MSI address. That hack was intended only for the Intel
IOMMU, and I recently enforced that, introducing a warning in
__irq_msi_compose_msg() if it was invoked with an APIC ID above 255.
Fix the AMD IOMMU not to depend on that hack any more, by having its own
irqdomain and directly putting the bits from the irq_cfg into the right
place in its ->activate() method.
Fixes: 47bea873cf "x86/msi: Only use high bits of MSI address for DMAR unit")
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Link: https://lore.kernel.org/r/05e3a5ba317f5ff48d2f8356f19e617f8b9d23a4.camel@infradead.org
136 lines
3.0 KiB
C
136 lines
3.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_HW_IRQ_H
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#define _ASM_X86_HW_IRQ_H
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/*
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* (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
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*
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* moved some of the old arch/i386/kernel/irq.h to here. VY
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*
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* IRQ/IPI changes taken from work by Thomas Radke
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* <tomsoft@informatik.tu-chemnitz.de>
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*
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* hacked by Andi Kleen for x86-64.
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* unified by tglx
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*/
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#include <asm/irq_vectors.h>
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#define IRQ_MATRIX_BITS NR_VECTORS
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#ifndef __ASSEMBLY__
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#include <linux/percpu.h>
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#include <linux/profile.h>
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#include <linux/smp.h>
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#include <linux/atomic.h>
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#include <asm/irq.h>
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#include <asm/sections.h>
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#ifdef CONFIG_X86_LOCAL_APIC
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struct irq_data;
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struct pci_dev;
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struct msi_desc;
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enum irq_alloc_type {
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X86_IRQ_ALLOC_TYPE_IOAPIC = 1,
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X86_IRQ_ALLOC_TYPE_HPET,
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X86_IRQ_ALLOC_TYPE_PCI_MSI,
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X86_IRQ_ALLOC_TYPE_PCI_MSIX,
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X86_IRQ_ALLOC_TYPE_DMAR,
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X86_IRQ_ALLOC_TYPE_AMDVI,
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X86_IRQ_ALLOC_TYPE_UV,
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};
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struct ioapic_alloc_info {
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int pin;
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int node;
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u32 is_level : 1;
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u32 active_low : 1;
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u32 valid : 1;
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};
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struct uv_alloc_info {
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int limit;
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int blade;
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unsigned long offset;
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char *name;
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};
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/**
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* irq_alloc_info - X86 specific interrupt allocation info
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* @type: X86 specific allocation type
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* @flags: Flags for allocation tweaks
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* @devid: Device ID for allocations
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* @hwirq: Associated hw interrupt number in the domain
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* @mask: CPU mask for vector allocation
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* @desc: Pointer to msi descriptor
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* @data: Allocation specific data
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*
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* @ioapic: IOAPIC specific allocation data
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* @uv: UV specific allocation data
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*/
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struct irq_alloc_info {
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enum irq_alloc_type type;
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u32 flags;
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u32 devid;
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irq_hw_number_t hwirq;
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const struct cpumask *mask;
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struct msi_desc *desc;
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void *data;
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union {
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struct ioapic_alloc_info ioapic;
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struct uv_alloc_info uv;
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};
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};
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struct irq_cfg {
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unsigned int dest_apicid;
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unsigned int vector;
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};
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extern struct irq_cfg *irq_cfg(unsigned int irq);
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extern struct irq_cfg *irqd_cfg(struct irq_data *irq_data);
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extern void lock_vector_lock(void);
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extern void unlock_vector_lock(void);
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#ifdef CONFIG_SMP
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extern void send_cleanup_vector(struct irq_cfg *);
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extern void irq_complete_move(struct irq_cfg *cfg);
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#else
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static inline void send_cleanup_vector(struct irq_cfg *c) { }
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static inline void irq_complete_move(struct irq_cfg *c) { }
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#endif
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extern void apic_ack_edge(struct irq_data *data);
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#else /* CONFIG_X86_LOCAL_APIC */
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static inline void lock_vector_lock(void) {}
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static inline void unlock_vector_lock(void) {}
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#endif /* CONFIG_X86_LOCAL_APIC */
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/* Statistics */
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extern atomic_t irq_err_count;
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extern atomic_t irq_mis_count;
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extern void elcr_set_level_irq(unsigned int irq);
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extern char irq_entries_start[];
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#ifdef CONFIG_TRACING
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#define trace_irq_entries_start irq_entries_start
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#endif
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extern char spurious_entries_start[];
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#define VECTOR_UNUSED NULL
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#define VECTOR_SHUTDOWN ((void *)-1L)
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#define VECTOR_RETRIGGERED ((void *)-2L)
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typedef struct irq_desc* vector_irq_t[NR_VECTORS];
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DECLARE_PER_CPU(vector_irq_t, vector_irq);
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#endif /* !ASSEMBLY_ */
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#endif /* _ASM_X86_HW_IRQ_H */
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