mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-29 07:34:06 +08:00
42a2d923cc
Pull networking updates from David Miller:
1) The addition of nftables. No longer will we need protocol aware
firewall filtering modules, it can all live in userspace.
At the core of nftables is a, for lack of a better term, virtual
machine that executes byte codes to inspect packet or metadata
(arriving interface index, etc.) and make verdict decisions.
Besides support for loading packet contents and comparing them, the
interpreter supports lookups in various datastructures as
fundamental operations. For example sets are supports, and
therefore one could create a set of whitelist IP address entries
which have ACCEPT verdicts attached to them, and use the appropriate
byte codes to do such lookups.
Since the interpreted code is composed in userspace, userspace can
do things like optimize things before giving it to the kernel.
Another major improvement is the capability of atomically updating
portions of the ruleset. In the existing netfilter implementation,
one has to update the entire rule set in order to make a change and
this is very expensive.
Userspace tools exist to create nftables rules using existing
netfilter rule sets, but both kernel implementations will need to
co-exist for quite some time as we transition from the old to the
new stuff.
Kudos to Patrick McHardy, Pablo Neira Ayuso, and others who have
worked so hard on this.
2) Daniel Borkmann and Hannes Frederic Sowa made several improvements
to our pseudo-random number generator, mostly used for things like
UDP port randomization and netfitler, amongst other things.
In particular the taus88 generater is updated to taus113, and test
cases are added.
3) Support 64-bit rates in HTB and TBF schedulers, from Eric Dumazet
and Yang Yingliang.
4) Add support for new 577xx tigon3 chips to tg3 driver, from Nithin
Sujir.
5) Fix two fatal flaws in TCP dynamic right sizing, from Eric Dumazet,
Neal Cardwell, and Yuchung Cheng.
6) Allow IP_TOS and IP_TTL to be specified in sendmsg() ancillary
control message data, much like other socket option attributes.
From Francesco Fusco.
7) Allow applications to specify a cap on the rate computed
automatically by the kernel for pacing flows, via a new
SO_MAX_PACING_RATE socket option. From Eric Dumazet.
8) Make the initial autotuned send buffer sizing in TCP more closely
reflect actual needs, from Eric Dumazet.
9) Currently early socket demux only happens for TCP sockets, but we
can do it for connected UDP sockets too. Implementation from Shawn
Bohrer.
10) Refactor inet socket demux with the goal of improving hash demux
performance for listening sockets. With the main goals being able
to use RCU lookups on even request sockets, and eliminating the
listening lock contention. From Eric Dumazet.
11) The bonding layer has many demuxes in it's fast path, and an RCU
conversion was started back in 3.11, several changes here extend the
RCU usage to even more locations. From Ding Tianhong and Wang
Yufen, based upon suggestions by Nikolay Aleksandrov and Veaceslav
Falico.
12) Allow stackability of segmentation offloads to, in particular, allow
segmentation offloading over tunnels. From Eric Dumazet.
13) Significantly improve the handling of secret keys we input into the
various hash functions in the inet hashtables, TCP fast open, as
well as syncookies. From Hannes Frederic Sowa. The key fundamental
operation is "net_get_random_once()" which uses static keys.
Hannes even extended this to ipv4/ipv6 fragmentation handling and
our generic flow dissector.
14) The generic driver layer takes care now to set the driver data to
NULL on device removal, so it's no longer necessary for drivers to
explicitly set it to NULL any more. Many drivers have been cleaned
up in this way, from Jingoo Han.
15) Add a BPF based packet scheduler classifier, from Daniel Borkmann.
16) Improve CRC32 interfaces and generic SKB checksum iterators so that
SCTP's checksumming can more cleanly be handled. Also from Daniel
Borkmann.
17) Add a new PMTU discovery mode, IP_PMTUDISC_INTERFACE, which forces
using the interface MTU value. This helps avoid PMTU attacks,
particularly on DNS servers. From Hannes Frederic Sowa.
18) Use generic XPS for transmit queue steering rather than internal
(re-)implementation in virtio-net. From Jason Wang.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1622 commits)
random32: add test cases for taus113 implementation
random32: upgrade taus88 generator to taus113 from errata paper
random32: move rnd_state to linux/random.h
random32: add prandom_reseed_late() and call when nonblocking pool becomes initialized
random32: add periodic reseeding
random32: fix off-by-one in seeding requirement
PHY: Add RTL8201CP phy_driver to realtek
xtsonic: add missing platform_set_drvdata() in xtsonic_probe()
macmace: add missing platform_set_drvdata() in mace_probe()
ethernet/arc/arc_emac: add missing platform_set_drvdata() in arc_emac_probe()
ipv6: protect for_each_sk_fl_rcu in mem_check with rcu_read_lock_bh
vlan: Implement vlan_dev_get_egress_qos_mask as an inline.
ixgbe: add warning when max_vfs is out of range.
igb: Update link modes display in ethtool
netfilter: push reasm skb through instead of original frag skbs
ip6_output: fragment outgoing reassembled skb properly
MAINTAINERS: mv643xx_eth: take over maintainership from Lennart
net_sched: tbf: support of 64bit rates
ixgbe: deleting dfwd stations out of order can cause null ptr deref
ixgbe: fix build err, num_rx_queues is only available with CONFIG_RPS
...
797 lines
18 KiB
Plaintext
797 lines
18 KiB
Plaintext
/*
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* Device Tree Source for AM33XX SoC
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*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pinctrl/am33xx.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "ti,am33xx";
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interrupt-parent = <&intc>;
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aliases {
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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serial0 = &uart0;
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serial1 = &uart1;
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serial2 = &uart2;
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serial3 = &uart3;
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serial4 = &uart4;
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serial5 = &uart5;
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d_can0 = &dcan0;
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d_can1 = &dcan1;
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usb0 = &usb0;
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usb1 = &usb1;
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phy0 = &usb0_phy;
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phy1 = &usb1_phy;
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ethernet0 = &cpsw_emac0;
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ethernet1 = &cpsw_emac1;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a8";
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device_type = "cpu";
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reg = <0>;
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/*
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* To consider voltage drop between PMIC and SoC,
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* tolerance value is reduced to 2% from 4% and
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* voltage value is increased as a precaution.
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*/
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operating-points = <
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/* kHz uV */
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720000 1285000
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600000 1225000
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500000 1125000
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275000 1125000
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>;
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voltage-tolerance = <2>; /* 2 percentage */
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clock-latency = <300000>; /* From omap-cpufreq driver */
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};
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};
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pmu {
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compatible = "arm,cortex-a8-pmu";
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interrupts = <3>;
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};
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/*
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* The soc node represents the soc top level view. It is uses for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap3-mpu";
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ti,hwmods = "mpu";
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};
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};
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am33xx_pinmux: pinmux@44e10800 {
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compatible = "pinctrl-single";
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reg = <0x44e10800 0x0238>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0x7f>;
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};
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/*
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* XXX: Use a flat representation of the AM33XX interconnect.
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* The real AM33XX interconnect network is quite complex.Since
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* that will not bring real advantage to represent that in DT
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* for the moment, just use a fake OCP bus entry to represent
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* the whole bus hierarchy.
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*/
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ocp {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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intc: interrupt-controller@48200000 {
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compatible = "ti,omap2-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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ti,intc-size = <128>;
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reg = <0x48200000 0x1000>;
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};
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edma: edma@49000000 {
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compatible = "ti,edma3";
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ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
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reg = <0x49000000 0x10000>,
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<0x44e10f90 0x10>;
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interrupts = <12 13 14>;
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#dma-cells = <1>;
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dma-channels = <64>;
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ti,edma-regions = <4>;
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ti,edma-slots = <256>;
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};
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gpio0: gpio@44e07000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio1";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x44e07000 0x1000>;
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interrupts = <96>;
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};
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gpio1: gpio@4804c000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio2";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x4804c000 0x1000>;
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interrupts = <98>;
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};
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gpio2: gpio@481ac000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio3";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x481ac000 0x1000>;
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interrupts = <32>;
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};
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gpio3: gpio@481ae000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio4";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x481ae000 0x1000>;
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interrupts = <62>;
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};
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uart0: serial@44e09000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart1";
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clock-frequency = <48000000>;
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reg = <0x44e09000 0x2000>;
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interrupts = <72>;
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status = "disabled";
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};
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uart1: serial@48022000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart2";
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clock-frequency = <48000000>;
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reg = <0x48022000 0x2000>;
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interrupts = <73>;
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status = "disabled";
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};
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uart2: serial@48024000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart3";
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clock-frequency = <48000000>;
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reg = <0x48024000 0x2000>;
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interrupts = <74>;
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status = "disabled";
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};
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uart3: serial@481a6000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart4";
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clock-frequency = <48000000>;
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reg = <0x481a6000 0x2000>;
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interrupts = <44>;
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status = "disabled";
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};
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uart4: serial@481a8000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart5";
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clock-frequency = <48000000>;
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reg = <0x481a8000 0x2000>;
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interrupts = <45>;
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status = "disabled";
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};
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uart5: serial@481aa000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart6";
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clock-frequency = <48000000>;
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reg = <0x481aa000 0x2000>;
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interrupts = <46>;
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status = "disabled";
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};
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i2c0: i2c@44e0b000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c1";
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reg = <0x44e0b000 0x1000>;
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interrupts = <70>;
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status = "disabled";
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};
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i2c1: i2c@4802a000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c2";
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reg = <0x4802a000 0x1000>;
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interrupts = <71>;
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status = "disabled";
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};
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i2c2: i2c@4819c000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c3";
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reg = <0x4819c000 0x1000>;
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interrupts = <30>;
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status = "disabled";
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};
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mmc1: mmc@48060000 {
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compatible = "ti,omap4-hsmmc";
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ti,hwmods = "mmc1";
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ti,dual-volt;
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ti,needs-special-reset;
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ti,needs-special-hs-handling;
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dmas = <&edma 24
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&edma 25>;
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dma-names = "tx", "rx";
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interrupts = <64>;
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interrupt-parent = <&intc>;
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reg = <0x48060000 0x1000>;
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status = "disabled";
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};
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mmc2: mmc@481d8000 {
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compatible = "ti,omap4-hsmmc";
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ti,hwmods = "mmc2";
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ti,needs-special-reset;
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dmas = <&edma 2
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&edma 3>;
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dma-names = "tx", "rx";
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interrupts = <28>;
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interrupt-parent = <&intc>;
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reg = <0x481d8000 0x1000>;
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status = "disabled";
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};
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mmc3: mmc@47810000 {
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compatible = "ti,omap4-hsmmc";
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ti,hwmods = "mmc3";
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ti,needs-special-reset;
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interrupts = <29>;
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interrupt-parent = <&intc>;
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reg = <0x47810000 0x1000>;
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status = "disabled";
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};
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hwspinlock: spinlock@480ca000 {
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compatible = "ti,omap4-hwspinlock";
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reg = <0x480ca000 0x1000>;
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ti,hwmods = "spinlock";
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};
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wdt2: wdt@44e35000 {
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compatible = "ti,omap3-wdt";
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ti,hwmods = "wd_timer2";
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reg = <0x44e35000 0x1000>;
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interrupts = <91>;
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};
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dcan0: d_can@481cc000 {
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compatible = "bosch,d_can";
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ti,hwmods = "d_can0";
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reg = <0x481cc000 0x2000
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0x44e10644 0x4>;
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interrupts = <52>;
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status = "disabled";
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};
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dcan1: d_can@481d0000 {
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compatible = "bosch,d_can";
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ti,hwmods = "d_can1";
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reg = <0x481d0000 0x2000
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0x44e10644 0x4>;
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interrupts = <55>;
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status = "disabled";
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};
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timer1: timer@44e31000 {
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compatible = "ti,am335x-timer-1ms";
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reg = <0x44e31000 0x400>;
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interrupts = <67>;
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ti,hwmods = "timer1";
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ti,timer-alwon;
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};
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timer2: timer@48040000 {
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compatible = "ti,am335x-timer";
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reg = <0x48040000 0x400>;
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interrupts = <68>;
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ti,hwmods = "timer2";
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};
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timer3: timer@48042000 {
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compatible = "ti,am335x-timer";
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reg = <0x48042000 0x400>;
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interrupts = <69>;
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ti,hwmods = "timer3";
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};
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timer4: timer@48044000 {
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compatible = "ti,am335x-timer";
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reg = <0x48044000 0x400>;
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interrupts = <92>;
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ti,hwmods = "timer4";
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ti,timer-pwm;
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};
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timer5: timer@48046000 {
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compatible = "ti,am335x-timer";
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reg = <0x48046000 0x400>;
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interrupts = <93>;
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ti,hwmods = "timer5";
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ti,timer-pwm;
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};
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timer6: timer@48048000 {
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compatible = "ti,am335x-timer";
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reg = <0x48048000 0x400>;
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interrupts = <94>;
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ti,hwmods = "timer6";
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ti,timer-pwm;
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};
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timer7: timer@4804a000 {
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compatible = "ti,am335x-timer";
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reg = <0x4804a000 0x400>;
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interrupts = <95>;
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ti,hwmods = "timer7";
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ti,timer-pwm;
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};
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rtc@44e3e000 {
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compatible = "ti,da830-rtc";
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reg = <0x44e3e000 0x1000>;
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interrupts = <75
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76>;
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ti,hwmods = "rtc";
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};
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spi0: spi@48030000 {
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compatible = "ti,omap4-mcspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x48030000 0x400>;
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interrupts = <65>;
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ti,spi-num-cs = <2>;
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ti,hwmods = "spi0";
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dmas = <&edma 16
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&edma 17
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&edma 18
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&edma 19>;
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dma-names = "tx0", "rx0", "tx1", "rx1";
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status = "disabled";
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};
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spi1: spi@481a0000 {
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compatible = "ti,omap4-mcspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x481a0000 0x400>;
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interrupts = <125>;
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ti,spi-num-cs = <2>;
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ti,hwmods = "spi1";
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dmas = <&edma 42
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&edma 43
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&edma 44
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&edma 45>;
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dma-names = "tx0", "rx0", "tx1", "rx1";
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status = "disabled";
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};
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usb: usb@47400000 {
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compatible = "ti,am33xx-usb";
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reg = <0x47400000 0x1000>;
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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ti,hwmods = "usb_otg_hs";
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status = "disabled";
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usb_ctrl_mod: control@44e10000 {
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compatible = "ti,am335x-usb-ctrl-module";
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reg = <0x44e10620 0x10
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0x44e10648 0x4>;
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reg-names = "phy_ctrl", "wakeup";
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status = "disabled";
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};
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usb0_phy: usb-phy@47401300 {
|
|
compatible = "ti,am335x-usb-phy";
|
|
reg = <0x47401300 0x100>;
|
|
reg-names = "phy";
|
|
status = "disabled";
|
|
ti,ctrl_mod = <&usb_ctrl_mod>;
|
|
};
|
|
|
|
usb0: usb@47401000 {
|
|
compatible = "ti,musb-am33xx";
|
|
status = "disabled";
|
|
reg = <0x47401400 0x400
|
|
0x47401000 0x200>;
|
|
reg-names = "mc", "control";
|
|
|
|
interrupts = <18>;
|
|
interrupt-names = "mc";
|
|
dr_mode = "otg";
|
|
mentor,multipoint = <1>;
|
|
mentor,num-eps = <16>;
|
|
mentor,ram-bits = <12>;
|
|
mentor,power = <500>;
|
|
phys = <&usb0_phy>;
|
|
|
|
dmas = <&cppi41dma 0 0 &cppi41dma 1 0
|
|
&cppi41dma 2 0 &cppi41dma 3 0
|
|
&cppi41dma 4 0 &cppi41dma 5 0
|
|
&cppi41dma 6 0 &cppi41dma 7 0
|
|
&cppi41dma 8 0 &cppi41dma 9 0
|
|
&cppi41dma 10 0 &cppi41dma 11 0
|
|
&cppi41dma 12 0 &cppi41dma 13 0
|
|
&cppi41dma 14 0 &cppi41dma 0 1
|
|
&cppi41dma 1 1 &cppi41dma 2 1
|
|
&cppi41dma 3 1 &cppi41dma 4 1
|
|
&cppi41dma 5 1 &cppi41dma 6 1
|
|
&cppi41dma 7 1 &cppi41dma 8 1
|
|
&cppi41dma 9 1 &cppi41dma 10 1
|
|
&cppi41dma 11 1 &cppi41dma 12 1
|
|
&cppi41dma 13 1 &cppi41dma 14 1>;
|
|
dma-names =
|
|
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
|
|
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
|
|
"rx14", "rx15",
|
|
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
|
|
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
|
|
"tx14", "tx15";
|
|
};
|
|
|
|
usb1_phy: usb-phy@47401b00 {
|
|
compatible = "ti,am335x-usb-phy";
|
|
reg = <0x47401b00 0x100>;
|
|
reg-names = "phy";
|
|
status = "disabled";
|
|
ti,ctrl_mod = <&usb_ctrl_mod>;
|
|
};
|
|
|
|
usb1: usb@47401800 {
|
|
compatible = "ti,musb-am33xx";
|
|
status = "disabled";
|
|
reg = <0x47401c00 0x400
|
|
0x47401800 0x200>;
|
|
reg-names = "mc", "control";
|
|
interrupts = <19>;
|
|
interrupt-names = "mc";
|
|
dr_mode = "otg";
|
|
mentor,multipoint = <1>;
|
|
mentor,num-eps = <16>;
|
|
mentor,ram-bits = <12>;
|
|
mentor,power = <500>;
|
|
phys = <&usb1_phy>;
|
|
|
|
dmas = <&cppi41dma 15 0 &cppi41dma 16 0
|
|
&cppi41dma 17 0 &cppi41dma 18 0
|
|
&cppi41dma 19 0 &cppi41dma 20 0
|
|
&cppi41dma 21 0 &cppi41dma 22 0
|
|
&cppi41dma 23 0 &cppi41dma 24 0
|
|
&cppi41dma 25 0 &cppi41dma 26 0
|
|
&cppi41dma 27 0 &cppi41dma 28 0
|
|
&cppi41dma 29 0 &cppi41dma 15 1
|
|
&cppi41dma 16 1 &cppi41dma 17 1
|
|
&cppi41dma 18 1 &cppi41dma 19 1
|
|
&cppi41dma 20 1 &cppi41dma 21 1
|
|
&cppi41dma 22 1 &cppi41dma 23 1
|
|
&cppi41dma 24 1 &cppi41dma 25 1
|
|
&cppi41dma 26 1 &cppi41dma 27 1
|
|
&cppi41dma 28 1 &cppi41dma 29 1>;
|
|
dma-names =
|
|
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
|
|
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
|
|
"rx14", "rx15",
|
|
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
|
|
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
|
|
"tx14", "tx15";
|
|
};
|
|
|
|
cppi41dma: dma-controller@07402000 {
|
|
compatible = "ti,am3359-cppi41";
|
|
reg = <0x47400000 0x1000
|
|
0x47402000 0x1000
|
|
0x47403000 0x1000
|
|
0x47404000 0x4000>;
|
|
reg-names = "glue", "controller", "scheduler", "queuemgr";
|
|
interrupts = <17>;
|
|
interrupt-names = "glue";
|
|
#dma-cells = <2>;
|
|
#dma-channels = <30>;
|
|
#dma-requests = <256>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss0: epwmss@48300000 {
|
|
compatible = "ti,am33xx-pwmss";
|
|
reg = <0x48300000 0x10>;
|
|
ti,hwmods = "epwmss0";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
ranges = <0x48300100 0x48300100 0x80 /* ECAP */
|
|
0x48300180 0x48300180 0x80 /* EQEP */
|
|
0x48300200 0x48300200 0x80>; /* EHRPWM */
|
|
|
|
ecap0: ecap@48300100 {
|
|
compatible = "ti,am33xx-ecap";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48300100 0x80>;
|
|
ti,hwmods = "ecap0";
|
|
status = "disabled";
|
|
};
|
|
|
|
ehrpwm0: ehrpwm@48300200 {
|
|
compatible = "ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48300200 0x80>;
|
|
ti,hwmods = "ehrpwm0";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss1: epwmss@48302000 {
|
|
compatible = "ti,am33xx-pwmss";
|
|
reg = <0x48302000 0x10>;
|
|
ti,hwmods = "epwmss1";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
ranges = <0x48302100 0x48302100 0x80 /* ECAP */
|
|
0x48302180 0x48302180 0x80 /* EQEP */
|
|
0x48302200 0x48302200 0x80>; /* EHRPWM */
|
|
|
|
ecap1: ecap@48302100 {
|
|
compatible = "ti,am33xx-ecap";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48302100 0x80>;
|
|
ti,hwmods = "ecap1";
|
|
status = "disabled";
|
|
};
|
|
|
|
ehrpwm1: ehrpwm@48302200 {
|
|
compatible = "ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48302200 0x80>;
|
|
ti,hwmods = "ehrpwm1";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
epwmss2: epwmss@48304000 {
|
|
compatible = "ti,am33xx-pwmss";
|
|
reg = <0x48304000 0x10>;
|
|
ti,hwmods = "epwmss2";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
ranges = <0x48304100 0x48304100 0x80 /* ECAP */
|
|
0x48304180 0x48304180 0x80 /* EQEP */
|
|
0x48304200 0x48304200 0x80>; /* EHRPWM */
|
|
|
|
ecap2: ecap@48304100 {
|
|
compatible = "ti,am33xx-ecap";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48304100 0x80>;
|
|
ti,hwmods = "ecap2";
|
|
status = "disabled";
|
|
};
|
|
|
|
ehrpwm2: ehrpwm@48304200 {
|
|
compatible = "ti,am33xx-ehrpwm";
|
|
#pwm-cells = <3>;
|
|
reg = <0x48304200 0x80>;
|
|
ti,hwmods = "ehrpwm2";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
mac: ethernet@4a100000 {
|
|
compatible = "ti,cpsw";
|
|
ti,hwmods = "cpgmac0";
|
|
cpdma_channels = <8>;
|
|
ale_entries = <1024>;
|
|
bd_ram_size = <0x2000>;
|
|
no_bd_ram = <0>;
|
|
rx_descs = <64>;
|
|
mac_control = <0x20>;
|
|
slaves = <2>;
|
|
active_slave = <0>;
|
|
cpts_clock_mult = <0x80000000>;
|
|
cpts_clock_shift = <29>;
|
|
reg = <0x4a100000 0x800
|
|
0x4a101200 0x100>;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
interrupt-parent = <&intc>;
|
|
/*
|
|
* c0_rx_thresh_pend
|
|
* c0_rx_pend
|
|
* c0_tx_pend
|
|
* c0_misc_pend
|
|
*/
|
|
interrupts = <40 41 42 43>;
|
|
ranges;
|
|
|
|
davinci_mdio: mdio@4a101000 {
|
|
compatible = "ti,davinci_mdio";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
ti,hwmods = "davinci_mdio";
|
|
bus_freq = <1000000>;
|
|
reg = <0x4a101000 0x100>;
|
|
};
|
|
|
|
cpsw_emac0: slave@4a100200 {
|
|
/* Filled in by U-Boot */
|
|
mac-address = [ 00 00 00 00 00 00 ];
|
|
};
|
|
|
|
cpsw_emac1: slave@4a100300 {
|
|
/* Filled in by U-Boot */
|
|
mac-address = [ 00 00 00 00 00 00 ];
|
|
};
|
|
|
|
phy_sel: cpsw-phy-sel@44e10650 {
|
|
compatible = "ti,am3352-cpsw-phy-sel";
|
|
reg= <0x44e10650 0x4>;
|
|
reg-names = "gmii-sel";
|
|
};
|
|
};
|
|
|
|
ocmcram: ocmcram@40300000 {
|
|
compatible = "ti,am3352-ocmcram";
|
|
reg = <0x40300000 0x10000>;
|
|
ti,hwmods = "ocmcram";
|
|
};
|
|
|
|
wkup_m3: wkup_m3@44d00000 {
|
|
compatible = "ti,am3353-wkup-m3";
|
|
reg = <0x44d00000 0x4000 /* M3 UMEM */
|
|
0x44d80000 0x2000>; /* M3 DMEM */
|
|
ti,hwmods = "wkup_m3";
|
|
ti,no-reset-on-init;
|
|
};
|
|
|
|
elm: elm@48080000 {
|
|
compatible = "ti,am3352-elm";
|
|
reg = <0x48080000 0x2000>;
|
|
interrupts = <4>;
|
|
ti,hwmods = "elm";
|
|
status = "disabled";
|
|
};
|
|
|
|
lcdc: lcdc@4830e000 {
|
|
compatible = "ti,am33xx-tilcdc";
|
|
reg = <0x4830e000 0x1000>;
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <36>;
|
|
ti,hwmods = "lcdc";
|
|
status = "disabled";
|
|
};
|
|
|
|
tscadc: tscadc@44e0d000 {
|
|
compatible = "ti,am3359-tscadc";
|
|
reg = <0x44e0d000 0x1000>;
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <16>;
|
|
ti,hwmods = "adc_tsc";
|
|
status = "disabled";
|
|
|
|
tsc {
|
|
compatible = "ti,am3359-tsc";
|
|
};
|
|
am335x_adc: adc {
|
|
#io-channel-cells = <1>;
|
|
compatible = "ti,am3359-adc";
|
|
};
|
|
};
|
|
|
|
gpmc: gpmc@50000000 {
|
|
compatible = "ti,am3352-gpmc";
|
|
ti,hwmods = "gpmc";
|
|
ti,no-idle-on-init;
|
|
reg = <0x50000000 0x2000>;
|
|
interrupts = <100>;
|
|
gpmc,num-cs = <7>;
|
|
gpmc,num-waitpins = <2>;
|
|
#address-cells = <2>;
|
|
#size-cells = <1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
sham: sham@53100000 {
|
|
compatible = "ti,omap4-sham";
|
|
ti,hwmods = "sham";
|
|
reg = <0x53100000 0x200>;
|
|
interrupts = <109>;
|
|
dmas = <&edma 36>;
|
|
dma-names = "rx";
|
|
};
|
|
|
|
aes: aes@53500000 {
|
|
compatible = "ti,omap4-aes";
|
|
ti,hwmods = "aes";
|
|
reg = <0x53500000 0xa0>;
|
|
interrupts = <103>;
|
|
dmas = <&edma 6>,
|
|
<&edma 5>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
mcasp0: mcasp@48038000 {
|
|
compatible = "ti,am33xx-mcasp-audio";
|
|
ti,hwmods = "mcasp0";
|
|
reg = <0x48038000 0x2000>,
|
|
<0x46000000 0x400000>;
|
|
reg-names = "mpu", "dat";
|
|
interrupts = <80>, <81>;
|
|
interrupts-names = "tx", "rx";
|
|
status = "disabled";
|
|
dmas = <&edma 8>,
|
|
<&edma 9>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
mcasp1: mcasp@4803C000 {
|
|
compatible = "ti,am33xx-mcasp-audio";
|
|
ti,hwmods = "mcasp1";
|
|
reg = <0x4803C000 0x2000>,
|
|
<0x46400000 0x400000>;
|
|
reg-names = "mpu", "dat";
|
|
interrupts = <82>, <83>;
|
|
interrupts-names = "tx", "rx";
|
|
status = "disabled";
|
|
dmas = <&edma 10>,
|
|
<&edma 11>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
rng: rng@48310000 {
|
|
compatible = "ti,omap4-rng";
|
|
ti,hwmods = "rng";
|
|
reg = <0x48310000 0x2000>;
|
|
interrupts = <111>;
|
|
};
|
|
};
|
|
};
|