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ca05fea6db
This patch is per Andi's request to remove NO_IOAPIC_CHECK from genapic and use heuristics to prevent unique I/O APIC ID check for systems that don't need it. The patch disables unique I/O APIC ID check for Xeon-based and other platforms that don't use serial APIC bus for interrupt delivery. Andi stated that AMD systems don't need unique IO_APIC_IDs either. Signed-off-by: Natalie Protasevich <Natalie.Protasevich@unisys.com> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
115 lines
3.3 KiB
C
115 lines
3.3 KiB
C
#ifndef _ASM_GENAPIC_H
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#define _ASM_GENAPIC_H 1
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/*
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* Generic APIC driver interface.
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*
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* An straight forward mapping of the APIC related parts of the
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* x86 subarchitecture interface to a dynamic object.
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*
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* This is used by the "generic" x86 subarchitecture.
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*
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* Copyright 2003 Andi Kleen, SuSE Labs.
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*/
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struct mpc_config_translation;
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struct mpc_config_bus;
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struct mp_config_table;
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struct mpc_config_processor;
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struct genapic {
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char *name;
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int (*probe)(void);
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int (*apic_id_registered)(void);
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cpumask_t (*target_cpus)(void);
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int int_delivery_mode;
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int int_dest_mode;
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int ESR_DISABLE;
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int apic_destination_logical;
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unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
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unsigned long (*check_apicid_present)(int apicid);
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int no_balance_irq;
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int no_ioapic_check;
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void (*init_apic_ldr)(void);
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physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
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void (*clustered_apic_check)(void);
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int (*multi_timer_check)(int apic, int irq);
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int (*apicid_to_node)(int logical_apicid);
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int (*cpu_to_logical_apicid)(int cpu);
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int (*cpu_present_to_apicid)(int mps_cpu);
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physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
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int (*mpc_apic_id)(struct mpc_config_processor *m,
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struct mpc_config_translation *t);
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void (*setup_portio_remap)(void);
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int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
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void (*enable_apic_mode)(void);
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u32 (*phys_pkg_id)(u32 cpuid_apic, int index_msb);
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/* mpparse */
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void (*mpc_oem_bus_info)(struct mpc_config_bus *, char *,
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struct mpc_config_translation *);
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void (*mpc_oem_pci_bus)(struct mpc_config_bus *,
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struct mpc_config_translation *);
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/* When one of the next two hooks returns 1 the genapic
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is switched to this. Essentially they are additional probe
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functions. */
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int (*mps_oem_check)(struct mp_config_table *mpc, char *oem,
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char *productid);
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int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
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unsigned (*get_apic_id)(unsigned long x);
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unsigned long apic_id_mask;
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unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask);
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/* ipi */
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void (*send_IPI_mask)(cpumask_t mask, int vector);
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void (*send_IPI_allbutself)(int vector);
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void (*send_IPI_all)(int vector);
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};
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#define APICFUNC(x) .x = x
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#define APIC_INIT(aname, aprobe) { \
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.name = aname, \
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.probe = aprobe, \
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.int_delivery_mode = INT_DELIVERY_MODE, \
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.int_dest_mode = INT_DEST_MODE, \
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.no_balance_irq = NO_BALANCE_IRQ, \
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.ESR_DISABLE = esr_disable, \
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.apic_destination_logical = APIC_DEST_LOGICAL, \
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APICFUNC(apic_id_registered), \
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APICFUNC(target_cpus), \
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APICFUNC(check_apicid_used), \
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APICFUNC(check_apicid_present), \
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APICFUNC(init_apic_ldr), \
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APICFUNC(ioapic_phys_id_map), \
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APICFUNC(clustered_apic_check), \
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APICFUNC(multi_timer_check), \
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APICFUNC(apicid_to_node), \
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APICFUNC(cpu_to_logical_apicid), \
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APICFUNC(cpu_present_to_apicid), \
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APICFUNC(apicid_to_cpu_present), \
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APICFUNC(mpc_apic_id), \
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APICFUNC(setup_portio_remap), \
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APICFUNC(check_phys_apicid_present), \
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APICFUNC(mpc_oem_bus_info), \
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APICFUNC(mpc_oem_pci_bus), \
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APICFUNC(mps_oem_check), \
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APICFUNC(get_apic_id), \
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.apic_id_mask = APIC_ID_MASK, \
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APICFUNC(cpu_mask_to_apicid), \
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APICFUNC(acpi_madt_oem_check), \
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APICFUNC(send_IPI_mask), \
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APICFUNC(send_IPI_allbutself), \
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APICFUNC(send_IPI_all), \
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APICFUNC(enable_apic_mode), \
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APICFUNC(phys_pkg_id), \
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}
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extern struct genapic *genapic;
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#endif
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