John Crispin e29b72f5e1 MIPS: Lantiq: Fix interface clock and PCI control register offset ... The XRX200 based SoC have a different register offset for the interface clock and PCI control registers. This patch detects the SoC and sets the register offset at runtime. This make PCI work on the VR9 SoC. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4113/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2012-08-01 17:57:04 +02:00
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dts	OF: MIPS: lantiq: implement OF support	2012-05-21 14:31:49 +01:00
falcon	MIPS: lantiq: implement support for FALCON soc	2012-05-21 14:31:55 +01:00
xway	MIPS: Lantiq: Fix interface clock and PCI control register offset	2012-08-01 17:57:04 +02:00
clk.c	MIPS: lantiq: implement support for clkdev api	2012-05-21 14:31:51 +01:00
clk.h	MIPS: lantiq: implement support for clkdev api	2012-05-21 14:31:51 +01:00
early_printk.c	MIPS: lantiq: fix early printk	2012-05-15 17:49:22 +02:00
irq.c	OF: MIPS: lantiq: implement irq_domain support	2012-05-21 14:31:50 +01:00
Kconfig	MIPS: lantiq: implement support for FALCON soc	2012-05-21 14:31:55 +01:00
Makefile	MIPS: lantiq: implement support for FALCON soc	2012-05-21 14:31:55 +01:00
Platform	MIPS: lantiq: implement support for FALCON soc	2012-05-21 14:31:55 +01:00
prom.c	MIPS: lantiq: remove orphaned code	2012-05-26 19:52:57 +01:00
prom.h	OF: MIPS: lantiq: implement OF support	2012-05-21 14:31:49 +01:00