mirror of
https://github.com/edk2-porting/linux-next.git
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ef92bfdaa7
Replace the chain of platform_get_resource() and devm_ioremap_resource() with devm_platform_ioremap_resource(). This allows to remove the local variable for (struct resource *), and have one function call less. Link: https://lore.kernel.org/r/20190905032122.26076-1-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
284 lines
7.3 KiB
C
284 lines
7.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <linux/io.h>
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#include <linux/log2.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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/* System Bus Controller registers */
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#define UNIPHIER_SBC_BASE 0x100 /* base address of bank0 space */
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#define UNIPHIER_SBC_BASE_BE BIT(0) /* bank_enable */
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#define UNIPHIER_SBC_CTRL0 0x200 /* timing parameter 0 of bank0 */
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#define UNIPHIER_SBC_CTRL1 0x204 /* timing parameter 1 of bank0 */
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#define UNIPHIER_SBC_CTRL2 0x208 /* timing parameter 2 of bank0 */
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#define UNIPHIER_SBC_CTRL3 0x20c /* timing parameter 3 of bank0 */
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#define UNIPHIER_SBC_CTRL4 0x300 /* timing parameter 4 of bank0 */
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#define UNIPHIER_SBC_STRIDE 0x10 /* register stride to next bank */
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#define UNIPHIER_SBC_NR_BANKS 8 /* number of banks (chip select) */
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#define UNIPHIER_SBC_BASE_DUMMY 0xffffffff /* data to squash bank 0, 1 */
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struct uniphier_system_bus_bank {
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u32 base;
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u32 end;
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};
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struct uniphier_system_bus_priv {
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struct device *dev;
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void __iomem *membase;
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struct uniphier_system_bus_bank bank[UNIPHIER_SBC_NR_BANKS];
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};
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static int uniphier_system_bus_add_bank(struct uniphier_system_bus_priv *priv,
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int bank, u32 addr, u64 paddr, u32 size)
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{
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u64 end, mask;
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dev_dbg(priv->dev,
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"range found: bank = %d, addr = %08x, paddr = %08llx, size = %08x\n",
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bank, addr, paddr, size);
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if (bank >= ARRAY_SIZE(priv->bank)) {
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dev_err(priv->dev, "unsupported bank number %d\n", bank);
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return -EINVAL;
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}
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if (priv->bank[bank].base || priv->bank[bank].end) {
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dev_err(priv->dev,
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"range for bank %d has already been specified\n", bank);
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return -EINVAL;
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}
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if (paddr > U32_MAX) {
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dev_err(priv->dev, "base address %llx is too high\n", paddr);
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return -EINVAL;
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}
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end = paddr + size;
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if (addr > paddr) {
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dev_err(priv->dev,
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"base %08x cannot be mapped to %08llx of parent\n",
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addr, paddr);
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return -EINVAL;
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}
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paddr -= addr;
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paddr = round_down(paddr, 0x00020000);
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end = round_up(end, 0x00020000);
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if (end > U32_MAX) {
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dev_err(priv->dev, "end address %08llx is too high\n", end);
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return -EINVAL;
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}
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mask = paddr ^ (end - 1);
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mask = roundup_pow_of_two(mask);
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paddr = round_down(paddr, mask);
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end = round_up(end, mask);
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priv->bank[bank].base = paddr;
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priv->bank[bank].end = end;
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dev_dbg(priv->dev, "range added: bank = %d, addr = %08x, end = %08x\n",
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bank, priv->bank[bank].base, priv->bank[bank].end);
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return 0;
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}
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static int uniphier_system_bus_check_overlap(
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const struct uniphier_system_bus_priv *priv)
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{
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int i, j;
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for (i = 0; i < ARRAY_SIZE(priv->bank); i++) {
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for (j = i + 1; j < ARRAY_SIZE(priv->bank); j++) {
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if (priv->bank[i].end > priv->bank[j].base &&
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priv->bank[i].base < priv->bank[j].end) {
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dev_err(priv->dev,
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"region overlap between bank%d and bank%d\n",
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i, j);
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return -EINVAL;
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}
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}
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}
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return 0;
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}
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static void uniphier_system_bus_check_boot_swap(
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struct uniphier_system_bus_priv *priv)
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{
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void __iomem *base_reg = priv->membase + UNIPHIER_SBC_BASE;
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int is_swapped;
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is_swapped = !(readl(base_reg) & UNIPHIER_SBC_BASE_BE);
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dev_dbg(priv->dev, "Boot Swap: %s\n", is_swapped ? "on" : "off");
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/*
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* If BOOT_SWAP was asserted on power-on-reset, the CS0 and CS1 are
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* swapped. In this case, bank0 and bank1 should be swapped as well.
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*/
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if (is_swapped)
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swap(priv->bank[0], priv->bank[1]);
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}
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static void uniphier_system_bus_set_reg(
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const struct uniphier_system_bus_priv *priv)
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{
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void __iomem *base_reg = priv->membase + UNIPHIER_SBC_BASE;
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u32 base, end, mask, val;
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int i;
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for (i = 0; i < ARRAY_SIZE(priv->bank); i++) {
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base = priv->bank[i].base;
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end = priv->bank[i].end;
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if (base == end) {
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/*
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* If SBC_BASE0 or SBC_BASE1 is set to zero, the access
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* to anywhere in the system bus space is routed to
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* bank 0 (if boot swap if off) or bank 1 (if boot swap
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* if on). It means that CPUs cannot get access to
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* bank 2 or later. In other words, bank 0/1 cannot
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* be disabled even if its bank_enable bits is cleared.
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* This seems odd, but it is how this hardware goes.
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* As a workaround, dummy data (0xffffffff) should be
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* set when the bank 0/1 is unused. As for bank 2 and
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* later, they can be simply disable by clearing the
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* bank_enable bit.
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*/
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if (i < 2)
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val = UNIPHIER_SBC_BASE_DUMMY;
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else
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val = 0;
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} else {
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mask = base ^ (end - 1);
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val = base & 0xfffe0000;
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val |= (~mask >> 16) & 0xfffe;
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val |= UNIPHIER_SBC_BASE_BE;
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}
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dev_dbg(priv->dev, "SBC_BASE[%d] = 0x%08x\n", i, val);
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writel(val, base_reg + UNIPHIER_SBC_STRIDE * i);
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}
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}
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static int uniphier_system_bus_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct uniphier_system_bus_priv *priv;
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const __be32 *ranges;
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u32 cells, addr, size;
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u64 paddr;
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int pna, bank, rlen, rone, ret;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->membase = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->membase))
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return PTR_ERR(priv->membase);
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priv->dev = dev;
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pna = of_n_addr_cells(dev->of_node);
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ret = of_property_read_u32(dev->of_node, "#address-cells", &cells);
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if (ret) {
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dev_err(dev, "failed to get #address-cells\n");
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return ret;
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}
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if (cells != 2) {
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dev_err(dev, "#address-cells must be 2\n");
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return -EINVAL;
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}
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ret = of_property_read_u32(dev->of_node, "#size-cells", &cells);
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if (ret) {
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dev_err(dev, "failed to get #size-cells\n");
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return ret;
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}
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if (cells != 1) {
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dev_err(dev, "#size-cells must be 1\n");
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return -EINVAL;
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}
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ranges = of_get_property(dev->of_node, "ranges", &rlen);
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if (!ranges) {
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dev_err(dev, "failed to get ranges property\n");
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return -ENOENT;
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}
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rlen /= sizeof(*ranges);
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rone = pna + 2;
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for (; rlen >= rone; rlen -= rone) {
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bank = be32_to_cpup(ranges++);
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addr = be32_to_cpup(ranges++);
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paddr = of_translate_address(dev->of_node, ranges);
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if (paddr == OF_BAD_ADDR)
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return -EINVAL;
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ranges += pna;
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size = be32_to_cpup(ranges++);
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ret = uniphier_system_bus_add_bank(priv, bank, addr,
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paddr, size);
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if (ret)
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return ret;
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}
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ret = uniphier_system_bus_check_overlap(priv);
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if (ret)
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return ret;
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uniphier_system_bus_check_boot_swap(priv);
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uniphier_system_bus_set_reg(priv);
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platform_set_drvdata(pdev, priv);
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/* Now, the bus is configured. Populate platform_devices below it */
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return of_platform_default_populate(dev->of_node, NULL, dev);
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}
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static int __maybe_unused uniphier_system_bus_resume(struct device *dev)
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{
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uniphier_system_bus_set_reg(dev_get_drvdata(dev));
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return 0;
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}
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static const struct dev_pm_ops uniphier_system_bus_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(NULL, uniphier_system_bus_resume)
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};
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static const struct of_device_id uniphier_system_bus_match[] = {
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{ .compatible = "socionext,uniphier-system-bus" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, uniphier_system_bus_match);
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static struct platform_driver uniphier_system_bus_driver = {
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.probe = uniphier_system_bus_probe,
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.driver = {
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.name = "uniphier-system-bus",
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.of_match_table = uniphier_system_bus_match,
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.pm = &uniphier_system_bus_pm_ops,
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},
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};
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module_platform_driver(uniphier_system_bus_driver);
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MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>");
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MODULE_DESCRIPTION("UniPhier System Bus driver");
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MODULE_LICENSE("GPL");
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