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https://github.com/edk2-porting/linux-next.git
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e83d58874b
This patch introduce Hyper-V related source code file - hyperv.c and per vm and per vcpu hyperv context structures. All Hyper-V MSR's and hypercall code moved into hyperv.c. All Hyper-V kvm/vcpu fields moved into appropriate hyperv context structures. Copyrights and authors information copied from x86.c to hyperv.c. Signed-off-by: Andrey Smetanin <asmetanin@virtuozzo.com> Signed-off-by: Denis V. Lunev <den@openvz.org> Reviewed-by: Peter Hornyack <peterhornyack@google.com> CC: Paolo Bonzini <pbonzini@redhat.com> CC: Gleb Natapov <gleb@kernel.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
196 lines
4.8 KiB
C
196 lines
4.8 KiB
C
#ifndef ARCH_X86_KVM_X86_H
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#define ARCH_X86_KVM_X86_H
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#include <linux/kvm_host.h>
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#include "kvm_cache_regs.h"
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#define MSR_IA32_CR_PAT_DEFAULT 0x0007040600070406ULL
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static inline void kvm_clear_exception_queue(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.exception.pending = false;
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}
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static inline void kvm_queue_interrupt(struct kvm_vcpu *vcpu, u8 vector,
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bool soft)
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{
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vcpu->arch.interrupt.pending = true;
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vcpu->arch.interrupt.soft = soft;
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vcpu->arch.interrupt.nr = vector;
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}
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static inline void kvm_clear_interrupt_queue(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.interrupt.pending = false;
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}
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static inline bool kvm_event_needs_reinjection(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.exception.pending || vcpu->arch.interrupt.pending ||
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vcpu->arch.nmi_injected;
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}
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static inline bool kvm_exception_is_soft(unsigned int nr)
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{
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return (nr == BP_VECTOR) || (nr == OF_VECTOR);
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}
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static inline bool is_protmode(struct kvm_vcpu *vcpu)
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{
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return kvm_read_cr0_bits(vcpu, X86_CR0_PE);
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}
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static inline int is_long_mode(struct kvm_vcpu *vcpu)
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{
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#ifdef CONFIG_X86_64
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return vcpu->arch.efer & EFER_LMA;
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#else
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return 0;
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#endif
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}
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static inline bool is_64_bit_mode(struct kvm_vcpu *vcpu)
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{
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int cs_db, cs_l;
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if (!is_long_mode(vcpu))
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return false;
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kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
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return cs_l;
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}
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static inline bool mmu_is_nested(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu;
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}
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static inline int is_pae(struct kvm_vcpu *vcpu)
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{
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return kvm_read_cr4_bits(vcpu, X86_CR4_PAE);
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}
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static inline int is_pse(struct kvm_vcpu *vcpu)
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{
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return kvm_read_cr4_bits(vcpu, X86_CR4_PSE);
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}
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static inline int is_paging(struct kvm_vcpu *vcpu)
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{
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return likely(kvm_read_cr0_bits(vcpu, X86_CR0_PG));
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}
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static inline u32 bit(int bitno)
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{
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return 1 << (bitno & 31);
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}
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static inline void vcpu_cache_mmio_info(struct kvm_vcpu *vcpu,
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gva_t gva, gfn_t gfn, unsigned access)
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{
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vcpu->arch.mmio_gva = gva & PAGE_MASK;
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vcpu->arch.access = access;
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vcpu->arch.mmio_gfn = gfn;
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vcpu->arch.mmio_gen = kvm_memslots(vcpu->kvm)->generation;
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}
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static inline bool vcpu_match_mmio_gen(struct kvm_vcpu *vcpu)
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{
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return vcpu->arch.mmio_gen == kvm_memslots(vcpu->kvm)->generation;
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}
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/*
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* Clear the mmio cache info for the given gva. If gva is MMIO_GVA_ANY, we
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* clear all mmio cache info.
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*/
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#define MMIO_GVA_ANY (~(gva_t)0)
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static inline void vcpu_clear_mmio_info(struct kvm_vcpu *vcpu, gva_t gva)
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{
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if (gva != MMIO_GVA_ANY && vcpu->arch.mmio_gva != (gva & PAGE_MASK))
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return;
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vcpu->arch.mmio_gva = 0;
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}
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static inline bool vcpu_match_mmio_gva(struct kvm_vcpu *vcpu, unsigned long gva)
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{
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if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gva &&
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vcpu->arch.mmio_gva == (gva & PAGE_MASK))
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return true;
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return false;
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}
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static inline bool vcpu_match_mmio_gpa(struct kvm_vcpu *vcpu, gpa_t gpa)
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{
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if (vcpu_match_mmio_gen(vcpu) && vcpu->arch.mmio_gfn &&
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vcpu->arch.mmio_gfn == gpa >> PAGE_SHIFT)
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return true;
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return false;
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}
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static inline unsigned long kvm_register_readl(struct kvm_vcpu *vcpu,
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enum kvm_reg reg)
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{
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unsigned long val = kvm_register_read(vcpu, reg);
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return is_64_bit_mode(vcpu) ? val : (u32)val;
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}
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static inline void kvm_register_writel(struct kvm_vcpu *vcpu,
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enum kvm_reg reg,
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unsigned long val)
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{
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if (!is_64_bit_mode(vcpu))
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val = (u32)val;
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return kvm_register_write(vcpu, reg, val);
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}
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static inline u64 get_kernel_ns(void)
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{
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return ktime_get_boot_ns();
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}
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static inline bool kvm_check_has_quirk(struct kvm *kvm, u64 quirk)
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{
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return !(kvm->arch.disabled_quirks & quirk);
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}
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void kvm_before_handle_nmi(struct kvm_vcpu *vcpu);
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void kvm_after_handle_nmi(struct kvm_vcpu *vcpu);
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void kvm_set_pending_timer(struct kvm_vcpu *vcpu);
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int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip);
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void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr);
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int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
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gva_t addr, void *val, unsigned int bytes,
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struct x86_exception *exception);
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int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
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gva_t addr, void *val, unsigned int bytes,
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struct x86_exception *exception);
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void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);
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u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
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bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data);
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int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
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int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
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bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
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int page_num);
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#define KVM_SUPPORTED_XCR0 (XSTATE_FP | XSTATE_SSE | XSTATE_YMM \
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| XSTATE_BNDREGS | XSTATE_BNDCSR \
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| XSTATE_AVX512)
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extern u64 host_xcr0;
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extern u64 kvm_supported_xcr0(void);
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extern unsigned int min_timer_period_us;
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extern unsigned int lapic_timer_advance_ns;
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extern struct static_key kvm_no_apic_vcpu;
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#endif
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