mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-17 01:34:00 +08:00
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
710 lines
15 KiB
C
710 lines
15 KiB
C
/*
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* Driver for NEC VR4100 series Real Time Clock unit.
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*
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* Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/device.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/mc146818rtc.h>
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#include <linux/miscdevice.h>
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#include <linux/module.h>
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#include <linux/poll.h>
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#include <linux/rtc.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/wait.h>
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#include <asm/div64.h>
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#include <asm/io.h>
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#include <asm/time.h>
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#include <asm/uaccess.h>
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#include <asm/vr41xx/vr41xx.h>
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MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
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MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
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MODULE_LICENSE("GPL");
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#define RTC1_TYPE1_START 0x0b0000c0UL
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#define RTC1_TYPE1_END 0x0b0000dfUL
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#define RTC2_TYPE1_START 0x0b0001c0UL
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#define RTC2_TYPE1_END 0x0b0001dfUL
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#define RTC1_TYPE2_START 0x0f000100UL
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#define RTC1_TYPE2_END 0x0f00011fUL
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#define RTC2_TYPE2_START 0x0f000120UL
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#define RTC2_TYPE2_END 0x0f00013fUL
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#define RTC1_SIZE 0x20
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#define RTC2_SIZE 0x20
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/* RTC 1 registers */
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#define ETIMELREG 0x00
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#define ETIMEMREG 0x02
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#define ETIMEHREG 0x04
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/* RFU */
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#define ECMPLREG 0x08
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#define ECMPMREG 0x0a
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#define ECMPHREG 0x0c
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/* RFU */
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#define RTCL1LREG 0x10
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#define RTCL1HREG 0x12
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#define RTCL1CNTLREG 0x14
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#define RTCL1CNTHREG 0x16
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#define RTCL2LREG 0x18
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#define RTCL2HREG 0x1a
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#define RTCL2CNTLREG 0x1c
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#define RTCL2CNTHREG 0x1e
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/* RTC 2 registers */
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#define TCLKLREG 0x00
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#define TCLKHREG 0x02
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#define TCLKCNTLREG 0x04
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#define TCLKCNTHREG 0x06
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/* RFU */
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#define RTCINTREG 0x1e
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#define TCLOCK_INT 0x08
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#define RTCLONG2_INT 0x04
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#define RTCLONG1_INT 0x02
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#define ELAPSEDTIME_INT 0x01
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#define RTC_FREQUENCY 32768
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#define MAX_PERIODIC_RATE 6553
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#define MAX_USER_PERIODIC_RATE 64
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static void __iomem *rtc1_base;
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static void __iomem *rtc2_base;
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#define rtc1_read(offset) readw(rtc1_base + (offset))
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#define rtc1_write(offset, value) writew((value), rtc1_base + (offset))
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#define rtc2_read(offset) readw(rtc2_base + (offset))
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#define rtc2_write(offset, value) writew((value), rtc2_base + (offset))
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static unsigned long epoch = 1970; /* Jan 1 1970 00:00:00 */
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static spinlock_t rtc_task_lock;
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static wait_queue_head_t rtc_wait;
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static unsigned long rtc_irq_data;
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static struct fasync_struct *rtc_async_queue;
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static rtc_task_t *rtc_callback;
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static char rtc_name[] = "RTC";
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static unsigned long periodic_frequency;
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static unsigned long periodic_count;
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typedef enum {
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RTC_RELEASE,
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RTC_OPEN,
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} rtc_status_t;
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static rtc_status_t rtc_status;
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typedef enum {
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FUNCTION_RTC_IOCTL,
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FUNCTION_RTC_CONTROL,
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} rtc_callfrom_t;
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struct resource rtc_resource[2] = {
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{ .name = rtc_name,
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.flags = IORESOURCE_MEM, },
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{ .name = rtc_name,
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.flags = IORESOURCE_MEM, },
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};
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#define RTC_NUM_RESOURCES sizeof(rtc_resource) / sizeof(struct resource)
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static inline unsigned long read_elapsed_second(void)
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{
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unsigned long first_low, first_mid, first_high;
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unsigned long second_low, second_mid, second_high;
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do {
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first_low = rtc1_read(ETIMELREG);
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first_mid = rtc1_read(ETIMEMREG);
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first_high = rtc1_read(ETIMEHREG);
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second_low = rtc1_read(ETIMELREG);
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second_mid = rtc1_read(ETIMEMREG);
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second_high = rtc1_read(ETIMEHREG);
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} while (first_low != second_low || first_mid != second_mid ||
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first_high != second_high);
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return (first_high << 17) | (first_mid << 1) | (first_low >> 15);
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}
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static inline void write_elapsed_second(unsigned long sec)
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{
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spin_lock_irq(&rtc_lock);
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rtc1_write(ETIMELREG, (uint16_t)(sec << 15));
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rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));
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rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));
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spin_unlock_irq(&rtc_lock);
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}
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static void set_alarm(struct rtc_time *time)
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{
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unsigned long alarm_sec;
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alarm_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
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time->tm_hour, time->tm_min, time->tm_sec);
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spin_lock_irq(&rtc_lock);
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rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));
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rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));
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rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));
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spin_unlock_irq(&rtc_lock);
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}
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static void read_alarm(struct rtc_time *time)
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{
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unsigned long low, mid, high;
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spin_lock_irq(&rtc_lock);
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low = rtc1_read(ECMPLREG);
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mid = rtc1_read(ECMPMREG);
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high = rtc1_read(ECMPHREG);
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spin_unlock_irq(&rtc_lock);
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to_tm((high << 17) | (mid << 1) | (low >> 15), time);
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time->tm_year -= 1900;
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}
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static void read_time(struct rtc_time *time)
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{
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unsigned long epoch_sec, elapsed_sec;
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epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
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elapsed_sec = read_elapsed_second();
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to_tm(epoch_sec + elapsed_sec, time);
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time->tm_year -= 1900;
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}
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static void set_time(struct rtc_time *time)
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{
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unsigned long epoch_sec, current_sec;
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epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
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current_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
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time->tm_hour, time->tm_min, time->tm_sec);
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write_elapsed_second(current_sec - epoch_sec);
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}
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static ssize_t rtc_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
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{
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DECLARE_WAITQUEUE(wait, current);
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unsigned long irq_data;
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int retval = 0;
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if (count != sizeof(unsigned int) && count != sizeof(unsigned long))
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return -EINVAL;
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add_wait_queue(&rtc_wait, &wait);
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do {
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__set_current_state(TASK_INTERRUPTIBLE);
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spin_lock_irq(&rtc_lock);
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irq_data = rtc_irq_data;
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rtc_irq_data = 0;
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spin_unlock_irq(&rtc_lock);
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if (irq_data != 0)
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break;
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if (file->f_flags & O_NONBLOCK) {
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retval = -EAGAIN;
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break;
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}
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if (signal_pending(current)) {
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retval = -ERESTARTSYS;
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break;
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}
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} while (1);
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if (retval == 0) {
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if (count == sizeof(unsigned int)) {
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retval = put_user(irq_data, (unsigned int __user *)buf);
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if (retval == 0)
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retval = sizeof(unsigned int);
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} else {
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retval = put_user(irq_data, (unsigned long __user *)buf);
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if (retval == 0)
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retval = sizeof(unsigned long);
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}
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}
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__set_current_state(TASK_RUNNING);
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remove_wait_queue(&rtc_wait, &wait);
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return retval;
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}
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static unsigned int rtc_poll(struct file *file, struct poll_table_struct *table)
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{
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poll_wait(file, &rtc_wait, table);
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if (rtc_irq_data != 0)
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return POLLIN | POLLRDNORM;
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return 0;
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}
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static int rtc_do_ioctl(unsigned int cmd, unsigned long arg, rtc_callfrom_t from)
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{
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struct rtc_time time;
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unsigned long count;
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switch (cmd) {
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case RTC_AIE_ON:
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enable_irq(ELAPSEDTIME_IRQ);
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break;
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case RTC_AIE_OFF:
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disable_irq(ELAPSEDTIME_IRQ);
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break;
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case RTC_PIE_ON:
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enable_irq(RTCLONG1_IRQ);
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break;
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case RTC_PIE_OFF:
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disable_irq(RTCLONG1_IRQ);
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break;
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case RTC_ALM_SET:
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if (copy_from_user(&time, (struct rtc_time __user *)arg,
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sizeof(struct rtc_time)))
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return -EFAULT;
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set_alarm(&time);
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break;
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case RTC_ALM_READ:
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memset(&time, 0, sizeof(struct rtc_time));
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read_alarm(&time);
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break;
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case RTC_RD_TIME:
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memset(&time, 0, sizeof(struct rtc_time));
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read_time(&time);
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if (copy_to_user((void __user *)arg, &time, sizeof(struct rtc_time)))
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return -EFAULT;
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break;
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case RTC_SET_TIME:
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if (capable(CAP_SYS_TIME) == 0)
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return -EACCES;
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if (copy_from_user(&time, (struct rtc_time __user *)arg,
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sizeof(struct rtc_time)))
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return -EFAULT;
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set_time(&time);
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break;
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case RTC_IRQP_READ:
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return put_user(periodic_frequency, (unsigned long __user *)arg);
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break;
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case RTC_IRQP_SET:
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if (arg > MAX_PERIODIC_RATE)
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return -EINVAL;
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if (from == FUNCTION_RTC_IOCTL && arg > MAX_USER_PERIODIC_RATE &&
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capable(CAP_SYS_RESOURCE) == 0)
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return -EACCES;
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periodic_frequency = arg;
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count = RTC_FREQUENCY;
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do_div(count, arg);
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periodic_count = count;
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spin_lock_irq(&rtc_lock);
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rtc1_write(RTCL1LREG, count);
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rtc1_write(RTCL1HREG, count >> 16);
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spin_unlock_irq(&rtc_lock);
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break;
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case RTC_EPOCH_READ:
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return put_user(epoch, (unsigned long __user *)arg);
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case RTC_EPOCH_SET:
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/* Doesn't support before 1900 */
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if (arg < 1900)
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return -EINVAL;
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if (capable(CAP_SYS_TIME) == 0)
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return -EACCES;
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epoch = arg;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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return rtc_do_ioctl(cmd, arg, FUNCTION_RTC_IOCTL);
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}
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static int rtc_open(struct inode *inode, struct file *file)
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{
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spin_lock_irq(&rtc_lock);
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if (rtc_status == RTC_OPEN) {
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spin_unlock_irq(&rtc_lock);
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return -EBUSY;
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}
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rtc_status = RTC_OPEN;
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rtc_irq_data = 0;
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spin_unlock_irq(&rtc_lock);
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return 0;
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}
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static int rtc_release(struct inode *inode, struct file *file)
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{
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if (file->f_flags & FASYNC)
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(void)fasync_helper(-1, file, 0, &rtc_async_queue);
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spin_lock_irq(&rtc_lock);
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rtc1_write(ECMPLREG, 0);
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rtc1_write(ECMPMREG, 0);
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rtc1_write(ECMPHREG, 0);
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rtc1_write(RTCL1LREG, 0);
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rtc1_write(RTCL1HREG, 0);
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rtc_status = RTC_RELEASE;
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spin_unlock_irq(&rtc_lock);
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disable_irq(ELAPSEDTIME_IRQ);
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disable_irq(RTCLONG1_IRQ);
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return 0;
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}
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static int rtc_fasync(int fd, struct file *file, int on)
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{
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return fasync_helper(fd, file, on, &rtc_async_queue);
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}
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static struct file_operations rtc_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.read = rtc_read,
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.poll = rtc_poll,
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.ioctl = rtc_ioctl,
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.open = rtc_open,
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.release = rtc_release,
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.fasync = rtc_fasync,
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};
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static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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spin_lock(&rtc_lock);
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rtc2_write(RTCINTREG, ELAPSEDTIME_INT);
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rtc_irq_data += 0x100;
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rtc_irq_data &= ~0xff;
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rtc_irq_data |= RTC_AF;
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spin_unlock(&rtc_lock);
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spin_lock(&rtc_lock);
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if (rtc_callback)
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rtc_callback->func(rtc_callback->private_data);
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spin_unlock(&rtc_lock);
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wake_up_interruptible(&rtc_wait);
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kill_fasync(&rtc_async_queue, SIGIO, POLL_IN);
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return IRQ_HANDLED;
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}
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static irqreturn_t rtclong1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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unsigned long count = periodic_count;
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spin_lock(&rtc_lock);
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rtc2_write(RTCINTREG, RTCLONG1_INT);
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rtc1_write(RTCL1LREG, count);
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rtc1_write(RTCL1HREG, count >> 16);
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rtc_irq_data += 0x100;
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rtc_irq_data &= ~0xff;
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rtc_irq_data |= RTC_PF;
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spin_unlock(&rtc_lock);
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spin_lock(&rtc_task_lock);
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if (rtc_callback)
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rtc_callback->func(rtc_callback->private_data);
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spin_unlock(&rtc_task_lock);
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wake_up_interruptible(&rtc_wait);
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kill_fasync(&rtc_async_queue, SIGIO, POLL_IN);
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return IRQ_HANDLED;
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}
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int rtc_register(rtc_task_t *task)
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{
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if (task == NULL || task->func == NULL)
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return -EINVAL;
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spin_lock_irq(&rtc_lock);
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if (rtc_status == RTC_OPEN) {
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spin_unlock_irq(&rtc_lock);
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return -EBUSY;
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}
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spin_lock(&rtc_task_lock);
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if (rtc_callback != NULL) {
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spin_unlock(&rtc_task_lock);
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spin_unlock_irq(&rtc_task_lock);
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return -EBUSY;
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}
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rtc_callback = task;
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spin_unlock(&rtc_task_lock);
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rtc_status = RTC_OPEN;
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spin_unlock_irq(&rtc_lock);
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return 0;
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}
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EXPORT_SYMBOL_GPL(rtc_register);
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int rtc_unregister(rtc_task_t *task)
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{
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spin_lock_irq(&rtc_task_lock);
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if (task == NULL || rtc_callback != task) {
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spin_unlock_irq(&rtc_task_lock);
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return -ENXIO;
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}
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spin_lock(&rtc_lock);
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rtc1_write(ECMPLREG, 0);
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rtc1_write(ECMPMREG, 0);
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rtc1_write(ECMPHREG, 0);
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rtc1_write(RTCL1LREG, 0);
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rtc1_write(RTCL1HREG, 0);
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rtc_status = RTC_RELEASE;
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spin_unlock(&rtc_lock);
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rtc_callback = NULL;
|
|
|
|
spin_unlock_irq(&rtc_task_lock);
|
|
|
|
disable_irq(ELAPSEDTIME_IRQ);
|
|
disable_irq(RTCLONG1_IRQ);
|
|
|
|
return 0;
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(rtc_unregister);
|
|
|
|
int rtc_control(rtc_task_t *task, unsigned int cmd, unsigned long arg)
|
|
{
|
|
int retval = 0;
|
|
|
|
spin_lock_irq(&rtc_task_lock);
|
|
|
|
if (rtc_callback != task)
|
|
retval = -ENXIO;
|
|
else
|
|
rtc_do_ioctl(cmd, arg, FUNCTION_RTC_CONTROL);
|
|
|
|
spin_unlock_irq(&rtc_task_lock);
|
|
|
|
return retval;
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(rtc_control);
|
|
|
|
static struct miscdevice rtc_miscdevice = {
|
|
.minor = RTC_MINOR,
|
|
.name = rtc_name,
|
|
.fops = &rtc_fops,
|
|
};
|
|
|
|
static int rtc_probe(struct device *dev)
|
|
{
|
|
struct platform_device *pdev;
|
|
unsigned int irq;
|
|
int retval;
|
|
|
|
pdev = to_platform_device(dev);
|
|
if (pdev->num_resources != 2)
|
|
return -EBUSY;
|
|
|
|
rtc1_base = ioremap(pdev->resource[0].start, RTC1_SIZE);
|
|
if (rtc1_base == NULL)
|
|
return -EBUSY;
|
|
|
|
rtc2_base = ioremap(pdev->resource[1].start, RTC2_SIZE);
|
|
if (rtc2_base == NULL) {
|
|
iounmap(rtc1_base);
|
|
rtc1_base = NULL;
|
|
return -EBUSY;
|
|
}
|
|
|
|
retval = misc_register(&rtc_miscdevice);
|
|
if (retval < 0) {
|
|
iounmap(rtc1_base);
|
|
iounmap(rtc2_base);
|
|
rtc1_base = NULL;
|
|
rtc2_base = NULL;
|
|
return retval;
|
|
}
|
|
|
|
spin_lock_irq(&rtc_lock);
|
|
|
|
rtc1_write(ECMPLREG, 0);
|
|
rtc1_write(ECMPMREG, 0);
|
|
rtc1_write(ECMPHREG, 0);
|
|
rtc1_write(RTCL1LREG, 0);
|
|
rtc1_write(RTCL1HREG, 0);
|
|
|
|
rtc_status = RTC_RELEASE;
|
|
rtc_irq_data = 0;
|
|
|
|
spin_unlock_irq(&rtc_lock);
|
|
|
|
init_waitqueue_head(&rtc_wait);
|
|
|
|
irq = ELAPSEDTIME_IRQ;
|
|
retval = request_irq(irq, elapsedtime_interrupt, SA_INTERRUPT,
|
|
"elapsed_time", NULL);
|
|
if (retval == 0) {
|
|
irq = RTCLONG1_IRQ;
|
|
retval = request_irq(irq, rtclong1_interrupt, SA_INTERRUPT,
|
|
"rtclong1", NULL);
|
|
}
|
|
|
|
if (retval < 0) {
|
|
printk(KERN_ERR "rtc: IRQ%d is busy\n", irq);
|
|
if (irq == RTCLONG1_IRQ)
|
|
free_irq(ELAPSEDTIME_IRQ, NULL);
|
|
iounmap(rtc1_base);
|
|
iounmap(rtc2_base);
|
|
rtc1_base = NULL;
|
|
rtc2_base = NULL;
|
|
return retval;
|
|
}
|
|
|
|
disable_irq(ELAPSEDTIME_IRQ);
|
|
disable_irq(RTCLONG1_IRQ);
|
|
|
|
spin_lock_init(&rtc_task_lock);
|
|
|
|
printk(KERN_INFO "rtc: Real Time Clock of NEC VR4100 series\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int rtc_remove(struct device *dev)
|
|
{
|
|
int retval;
|
|
|
|
retval = misc_deregister(&rtc_miscdevice);
|
|
if (retval < 0)
|
|
return retval;
|
|
|
|
free_irq(ELAPSEDTIME_IRQ, NULL);
|
|
free_irq(RTCLONG1_IRQ, NULL);
|
|
if (rtc1_base != NULL)
|
|
iounmap(rtc1_base);
|
|
if (rtc2_base != NULL)
|
|
iounmap(rtc2_base);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_device *rtc_platform_device;
|
|
|
|
static struct device_driver rtc_device_driver = {
|
|
.name = rtc_name,
|
|
.bus = &platform_bus_type,
|
|
.probe = rtc_probe,
|
|
.remove = rtc_remove,
|
|
};
|
|
|
|
static int __devinit vr41xx_rtc_init(void)
|
|
{
|
|
int retval;
|
|
|
|
switch (current_cpu_data.cputype) {
|
|
case CPU_VR4111:
|
|
case CPU_VR4121:
|
|
rtc_resource[0].start = RTC1_TYPE1_START;
|
|
rtc_resource[0].end = RTC1_TYPE1_END;
|
|
rtc_resource[1].start = RTC2_TYPE1_START;
|
|
rtc_resource[1].end = RTC2_TYPE1_END;
|
|
break;
|
|
case CPU_VR4122:
|
|
case CPU_VR4131:
|
|
case CPU_VR4133:
|
|
rtc_resource[0].start = RTC1_TYPE2_START;
|
|
rtc_resource[0].end = RTC1_TYPE2_END;
|
|
rtc_resource[1].start = RTC2_TYPE2_START;
|
|
rtc_resource[1].end = RTC2_TYPE2_END;
|
|
break;
|
|
default:
|
|
return -ENODEV;
|
|
break;
|
|
}
|
|
|
|
rtc_platform_device = platform_device_register_simple("RTC", -1, rtc_resource, RTC_NUM_RESOURCES);
|
|
if (IS_ERR(rtc_platform_device))
|
|
return PTR_ERR(rtc_platform_device);
|
|
|
|
retval = driver_register(&rtc_device_driver);
|
|
if (retval < 0)
|
|
platform_device_unregister(rtc_platform_device);
|
|
|
|
return retval;
|
|
}
|
|
|
|
static void __devexit vr41xx_rtc_exit(void)
|
|
{
|
|
driver_unregister(&rtc_device_driver);
|
|
|
|
platform_device_unregister(rtc_platform_device);
|
|
}
|
|
|
|
module_init(vr41xx_rtc_init);
|
|
module_exit(vr41xx_rtc_exit);
|