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dfab34aa61
Device-tree updates for 3.10. The bulk of the churn in this branch is due to i.MX moving from C-defined pin control over to device tree, which is a one-time conversion that will allow greater flexibility down the road. Besides that, there's PCI-e bindings for Marvell mvebu platforms and a handful of cleanups to tegra due to the new include file functionality of the device tree compiler. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJRgg+aAAoJEIwa5zzehBx3/q0P/RumfsMePxhmSU4HM16a3w0B 9jg7wd9BxVrJUzTY9F7z+Q72x0u5USUtVnyoY5s68DQMkFyhBQUuKCCiwCqtpCBN 2Uf0JQjYHdqEFKgN6DiPxSVRPXC8jmMzYGRk5RTI5kVWxaBEMdw9rTo0x4vol/Cv 7Z+W+gixXZbgydH/ogqly1MQc9vWliRTfU2zv2WOZ7TLyyEd2lOjMMBIX/n3vI4l T32JOUDgIYK841s9n2eNQGEjqB/OghMMrQsdjUAd++je6QtqgZk9+uHfPFC1C0wQ 3F93te9HleluYcOcxGmedK3B9QO2Y8y1XHe+uxLZVKXBR+6/5AtSwZFRQm10uMCI JUz3j6tRAWDAOin2vXZcf2CVPn5HZbh3D67WuUdfxMngH0XHvSZRC9eRd70jWvDe 9FY4NRTjRSLu/VtgCzF8tSA3cEylhyKYdK6Cf0nbwQ26JTO2VNNCnjuCbRfWp+E1 y0jIQwsaiNLEBwbesNbnFrj+YTTAZBI4+Y5HrSV7Og5/5X9BWs11KAkRppNOj0Uc WnqG26SssuBNBVHPOO2RrOwq3n2VphQ/BB8j9yrpWtcAlQxdjmVqFj/GIIiHr2Wm GuKWgM5fn+xF0oeCriq4Ti5eCJQ7Ev6Er46WrGQDBniZWVi05aP51ks1bfwbfHqn z1o5QfLpr4PkJPk0mnim =8X1b -----END PGP SIGNATURE----- Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device-tree updates from Olof Johansson: "Part 1 of device-tree updates for 3.10. The bulk of the churn in this branch is due to i.MX moving from C-defined pin control over to device tree, which is a one-time conversion that will allow greater flexibility down the road. Besides that, there's PCI-e bindings for Marvell mvebu platforms and a handful of cleanups to tegra due to the new include file functionality of the device tree compiler" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (113 commits) arm: mvebu: PCIe Device Tree informations for Armada XP GP arm: mvebu: PCIe Device Tree informations for Armada 370 DB arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox arm: mvebu: PCIe Device Tree informations for Armada XP DB arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 arm: mvebu: add PCIe Device Tree informations for Armada XP arm: mvebu: add PCIe Device Tree informations for Armada 370 ARM: sunxi: unify osc24M_fixed and osc24M arm: vt8500: Add SDHC support to WM8505 DT ARM: dts: Add a 64 bits version of the skeleton device tree ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board ARM: mvebu: Add support for NOR flash device on Armada XP-GP board ARM: mvebu: Add Device Bus support for Armada 370/XP SoC ARM: dts: imx6dl-wandboard: Add USB Host support ARM: dts: imx51 cpu node ARM: dts: Add missing imx27-phytec-phycore dtb target ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module ARM: i.MX51: Add PATA support ARM: dts: Add initial support for Wandboard Dual-Lite ...
598 lines
14 KiB
Plaintext
598 lines
14 KiB
Plaintext
/*
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* at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
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*
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* Copyright (C) 2011 Atmel,
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* 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
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* 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/include/ "skeleton.dtsi"
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/ {
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model = "Atmel AT91SAM9260 family SoC";
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compatible = "atmel,at91sam9260";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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serial4 = &usart3;
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serial5 = &uart0;
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serial6 = &uart1;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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tcb0 = &tcb0;
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tcb1 = &tcb1;
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i2c0 = &i2c0;
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ssc0 = &ssc0;
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};
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cpus {
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cpu@0 {
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compatible = "arm,arm926ejs";
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};
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};
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memory {
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reg = <0x20000000 0x04000000>;
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};
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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#interrupt-cells = <3>;
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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atmel,external-irqs = <29 30 31>;
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};
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ramc0: ramc@ffffea00 {
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compatible = "atmel,at91sam9260-sdramc";
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reg = <0xffffea00 0x200>;
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};
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91rm9200-pmc";
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reg = <0xfffffc00 0x100>;
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};
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rstc@fffffd00 {
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compatible = "atmel,at91sam9260-rstc";
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reg = <0xfffffd00 0x10>;
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};
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shdwc@fffffd10 {
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compatible = "atmel,at91sam9260-shdwc";
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reg = <0xfffffd10 0x10>;
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};
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pit: timer@fffffd30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffd30 0xf>;
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interrupts = <1 4 7>;
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};
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tcb0: timer@fffa0000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfffa0000 0x100>;
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interrupts = <17 4 0 18 4 0 19 4 0>;
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};
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tcb1: timer@fffdc000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfffdc000 0x100>;
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interrupts = <26 4 0 27 4 0 28 4 0>;
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};
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pinctrl@fffff400 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
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ranges = <0xfffff400 0xfffff400 0x600>;
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atmel,mux-mask = <
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/* A B */
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0xffffffff 0xffc00c3b /* pioA */
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0xffffffff 0x7fff3ccf /* pioB */
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0xffffffff 0x007fffff /* pioC */
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>;
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/* shared pinctrl settings */
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dbgu {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<1 14 0x1 0x0 /* PB14 periph A */
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1 15 0x1 0x1>; /* PB15 periph with pullup */
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};
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};
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usart0 {
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pinctrl_usart0: usart0-0 {
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atmel,pins =
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<1 4 0x1 0x0 /* PB4 periph A */
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1 5 0x1 0x0>; /* PB5 periph A */
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};
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pinctrl_usart0_rts: usart0_rts-0 {
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atmel,pins =
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<1 26 0x1 0x0>; /* PB26 periph A */
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};
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pinctrl_usart0_cts: usart0_cts-0 {
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atmel,pins =
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<1 27 0x1 0x0>; /* PB27 periph A */
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};
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pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
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atmel,pins =
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<1 24 0x1 0x0 /* PB24 periph A */
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1 22 0x1 0x0>; /* PB22 periph A */
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};
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pinctrl_usart0_dcd: usart0_dcd-0 {
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atmel,pins =
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<1 23 0x1 0x0>; /* PB23 periph A */
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};
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pinctrl_usart0_ri: usart0_ri-0 {
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atmel,pins =
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<1 25 0x1 0x0>; /* PB25 periph A */
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};
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};
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usart1 {
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pinctrl_usart1: usart1-0 {
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atmel,pins =
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<1 6 0x1 0x1 /* PB6 periph A with pullup */
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1 7 0x1 0x0>; /* PB7 periph A */
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};
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pinctrl_usart1_rts: usart1_rts-0 {
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atmel,pins =
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<1 28 0x1 0x0>; /* PB28 periph A */
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};
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pinctrl_usart1_cts: usart1_cts-0 {
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atmel,pins =
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<1 29 0x1 0x0>; /* PB29 periph A */
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};
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};
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usart2 {
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pinctrl_usart2: usart2-0 {
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atmel,pins =
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<1 8 0x1 0x1 /* PB8 periph A with pullup */
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1 9 0x1 0x0>; /* PB9 periph A */
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};
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pinctrl_usart2_rts: usart2_rts-0 {
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atmel,pins =
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<0 4 0x1 0x0>; /* PA4 periph A */
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};
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pinctrl_usart2_cts: usart2_cts-0 {
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atmel,pins =
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<0 5 0x1 0x0>; /* PA5 periph A */
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};
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};
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usart3 {
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pinctrl_usart3: usart3-0 {
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atmel,pins =
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<1 10 0x1 0x1 /* PB10 periph A with pullup */
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1 11 0x1 0x0>; /* PB11 periph A */
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};
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pinctrl_usart3_rts: usart3_rts-0 {
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atmel,pins =
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<2 8 0x2 0x0>; /* PC8 periph B */
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};
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pinctrl_usart3_cts: usart3_cts-0 {
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atmel,pins =
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<2 10 0x2 0x0>; /* PC10 periph B */
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};
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};
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uart0 {
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pinctrl_uart0: uart0-0 {
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atmel,pins =
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<0 31 0x2 0x1 /* PA31 periph B with pullup */
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0 30 0x2 0x0>; /* PA30 periph B */
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};
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};
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uart1 {
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pinctrl_uart1: uart1-0 {
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atmel,pins =
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<1 12 0x1 0x1 /* PB12 periph A with pullup */
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1 13 0x1 0x0>; /* PB13 periph A */
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};
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};
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nand {
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pinctrl_nand: nand-0 {
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atmel,pins =
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<2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */
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2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
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};
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};
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macb {
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pinctrl_macb_rmii: macb_rmii-0 {
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atmel,pins =
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<0 12 0x1 0x0 /* PA12 periph A */
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0 13 0x1 0x0 /* PA13 periph A */
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0 14 0x1 0x0 /* PA14 periph A */
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0 15 0x1 0x0 /* PA15 periph A */
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0 16 0x1 0x0 /* PA16 periph A */
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0 17 0x1 0x0 /* PA17 periph A */
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0 18 0x1 0x0 /* PA18 periph A */
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0 19 0x1 0x0 /* PA19 periph A */
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0 20 0x1 0x0 /* PA20 periph A */
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0 21 0x1 0x0>; /* PA21 periph A */
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};
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pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
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atmel,pins =
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<0 22 0x2 0x0 /* PA22 periph B */
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0 23 0x2 0x0 /* PA23 periph B */
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0 24 0x2 0x0 /* PA24 periph B */
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0 25 0x2 0x0 /* PA25 periph B */
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0 26 0x2 0x0 /* PA26 periph B */
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0 27 0x2 0x0 /* PA27 periph B */
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0 28 0x2 0x0 /* PA28 periph B */
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0 29 0x2 0x0>; /* PA29 periph B */
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};
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pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
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atmel,pins =
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<0 10 0x2 0x0 /* PA10 periph B */
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0 11 0x2 0x0 /* PA11 periph B */
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0 24 0x2 0x0 /* PA24 periph B */
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0 25 0x2 0x0 /* PA25 periph B */
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0 26 0x2 0x0 /* PA26 periph B */
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0 27 0x2 0x0 /* PA27 periph B */
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0 28 0x2 0x0 /* PA28 periph B */
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0 29 0x2 0x0>; /* PA29 periph B */
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};
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};
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mmc0 {
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pinctrl_mmc0_clk: mmc0_clk-0 {
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atmel,pins =
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<0 8 0x1 0x0>; /* PA8 periph A */
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};
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pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
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atmel,pins =
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<0 7 0x1 0x1 /* PA7 periph A with pullup */
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0 6 0x1 0x1>; /* PA6 periph A with pullup */
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};
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pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
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atmel,pins =
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<0 9 0x1 0x1 /* PA9 periph A with pullup */
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0 10 0x1 0x1 /* PA10 periph A with pullup */
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0 11 0x1 0x1>; /* PA11 periph A with pullup */
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};
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pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
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atmel,pins =
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<0 1 0x2 0x1 /* PA1 periph B with pullup */
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0 0 0x2 0x1>; /* PA0 periph B with pullup */
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};
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pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
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atmel,pins =
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<0 5 0x2 0x1 /* PA5 periph B with pullup */
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0 4 0x2 0x1 /* PA4 periph B with pullup */
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0 3 0x2 0x1>; /* PA3 periph B with pullup */
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};
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};
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ssc0 {
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pinctrl_ssc0_tx: ssc0_tx-0 {
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atmel,pins =
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<1 16 0x1 0x0 /* PB16 periph A */
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1 17 0x1 0x0 /* PB17 periph A */
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1 18 0x1 0x0>; /* PB18 periph A */
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};
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pinctrl_ssc0_rx: ssc0_rx-0 {
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atmel,pins =
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<1 19 0x1 0x0 /* PB19 periph A */
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1 20 0x1 0x0 /* PB20 periph A */
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1 21 0x1 0x0>; /* PB21 periph A */
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};
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};
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spi0 {
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pinctrl_spi0: spi0-0 {
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atmel,pins =
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<0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */
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0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */
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0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */
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};
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};
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spi1 {
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pinctrl_spi1: spi1-0 {
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atmel,pins =
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<1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */
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1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */
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1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */
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};
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};
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pioA: gpio@fffff400 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff400 0x200>;
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interrupts = <2 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioB: gpio@fffff600 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff600 0x200>;
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interrupts = <3 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pioC: gpio@fffff800 {
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compatible = "atmel,at91rm9200-gpio";
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reg = <0xfffff800 0x200>;
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interrupts = <4 4 1>;
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#gpio-cells = <2>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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dbgu: serial@fffff200 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffff200 0x200>;
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interrupts = <1 4 7>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dbgu>;
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status = "disabled";
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};
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usart0: serial@fffb0000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffb0000 0x200>;
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interrupts = <6 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart0>;
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status = "disabled";
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};
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usart1: serial@fffb4000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffb4000 0x200>;
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interrupts = <7 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart1>;
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status = "disabled";
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};
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usart2: serial@fffb8000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffb8000 0x200>;
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interrupts = <8 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart2>;
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status = "disabled";
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};
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usart3: serial@fffd0000 {
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compatible = "atmel,at91sam9260-usart";
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reg = <0xfffd0000 0x200>;
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interrupts = <23 4 5>;
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usart3>;
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status = "disabled";
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};
|
|
|
|
uart0: serial@fffd4000 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfffd4000 0x200>;
|
|
interrupts = <24 4 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
uart1: serial@fffd8000 {
|
|
compatible = "atmel,at91sam9260-usart";
|
|
reg = <0xfffd8000 0x200>;
|
|
interrupts = <25 4 5>;
|
|
atmel,use-dma-rx;
|
|
atmel,use-dma-tx;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
macb0: ethernet@fffc4000 {
|
|
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
|
reg = <0xfffc4000 0x100>;
|
|
interrupts = <21 4 3>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_macb_rmii>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb1: gadget@fffa4000 {
|
|
compatible = "atmel,at91rm9200-udc";
|
|
reg = <0xfffa4000 0x4000>;
|
|
interrupts = <10 4 2>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c0: i2c@fffac000 {
|
|
compatible = "atmel,at91sam9260-i2c";
|
|
reg = <0xfffac000 0x100>;
|
|
interrupts = <11 4 6>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
mmc0: mmc@fffa8000 {
|
|
compatible = "atmel,hsmci";
|
|
reg = <0xfffa8000 0x600>;
|
|
interrupts = <9 4 0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ssc0: ssc@fffbc000 {
|
|
compatible = "atmel,at91rm9200-ssc";
|
|
reg = <0xfffbc000 0x4000>;
|
|
interrupts = <14 4 5>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi0: spi@fffc8000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "atmel,at91rm9200-spi";
|
|
reg = <0xfffc8000 0x200>;
|
|
interrupts = <12 4 3>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_spi0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi1: spi@fffcc000 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "atmel,at91rm9200-spi";
|
|
reg = <0xfffcc000 0x200>;
|
|
interrupts = <13 4 3>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_spi1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
adc0: adc@fffe0000 {
|
|
compatible = "atmel,at91sam9260-adc";
|
|
reg = <0xfffe0000 0x100>;
|
|
interrupts = <5 4 0>;
|
|
atmel,adc-use-external-triggers;
|
|
atmel,adc-channels-used = <0xf>;
|
|
atmel,adc-vref = <3300>;
|
|
atmel,adc-num-channels = <4>;
|
|
atmel,adc-startup-time = <15>;
|
|
atmel,adc-channel-base = <0x30>;
|
|
atmel,adc-drdy-mask = <0x10000>;
|
|
atmel,adc-status-register = <0x1c>;
|
|
atmel,adc-trigger-register = <0x04>;
|
|
atmel,adc-res = <8 10>;
|
|
atmel,adc-res-names = "lowres", "highres";
|
|
atmel,adc-use-res = "highres";
|
|
|
|
trigger@0 {
|
|
trigger-name = "timer-counter-0";
|
|
trigger-value = <0x1>;
|
|
};
|
|
trigger@1 {
|
|
trigger-name = "timer-counter-1";
|
|
trigger-value = <0x3>;
|
|
};
|
|
|
|
trigger@2 {
|
|
trigger-name = "timer-counter-2";
|
|
trigger-value = <0x5>;
|
|
};
|
|
|
|
trigger@3 {
|
|
trigger-name = "external";
|
|
trigger-value = <0x13>;
|
|
trigger-external;
|
|
};
|
|
};
|
|
|
|
watchdog@fffffd40 {
|
|
compatible = "atmel,at91sam9260-wdt";
|
|
reg = <0xfffffd40 0x10>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
nand0: nand@40000000 {
|
|
compatible = "atmel,at91rm9200-nand";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0x40000000 0x10000000
|
|
0xffffe800 0x200
|
|
>;
|
|
atmel,nand-addr-offset = <21>;
|
|
atmel,nand-cmd-offset = <22>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_nand>;
|
|
gpios = <&pioC 13 0
|
|
&pioC 14 0
|
|
0
|
|
>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb0: ohci@00500000 {
|
|
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
|
|
reg = <0x00500000 0x100000>;
|
|
interrupts = <20 4 2>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
i2c@0 {
|
|
compatible = "i2c-gpio";
|
|
gpios = <&pioA 23 0 /* sda */
|
|
&pioA 24 0 /* scl */
|
|
>;
|
|
i2c-gpio,sda-open-drain;
|
|
i2c-gpio,scl-open-drain;
|
|
i2c-gpio,delay-us = <2>; /* ~100 kHz */
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|