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The AD5694/AD5694R/AD5695R/AD5696/AD5696R are a family of 4 channel DACs with 12-bit, 14-bit and 16-bit precision respectively. The devices have either no built-in reference, or built-in 2.5V reference. The AD5671R/AD5675R are similar, except that they have 8 instead of 4 channels. These devices are similar to AD5672R/AD5676/AD5676R and AD5684/AD5684R/AD5684/AD5685R/AD5686/AD5686R, except that they use i2c instead of spi. Datasheets: http://www.analog.com/media/en/technical-documentation/data-sheets/AD5671R_5675R.pdf http://www.analog.com/media/en/technical-documentation/data-sheets/AD5696R_5695R_5694R.pdf Signed-off-by: Stefan Popa <stefan.popa@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
122 lines
2.7 KiB
C
122 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* This file is part of AD5686 DAC driver
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*
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* Copyright 2018 Analog Devices Inc.
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*/
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#ifndef __DRIVERS_IIO_DAC_AD5686_H__
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#define __DRIVERS_IIO_DAC_AD5686_H__
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#include <linux/types.h>
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#include <linux/cache.h>
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#include <linux/mutex.h>
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#include <linux/kernel.h>
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#define AD5686_ADDR(x) ((x) << 16)
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#define AD5686_CMD(x) ((x) << 20)
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#define AD5686_ADDR_DAC(chan) (0x1 << (chan))
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#define AD5686_ADDR_ALL_DAC 0xF
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#define AD5686_CMD_NOOP 0x0
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#define AD5686_CMD_WRITE_INPUT_N 0x1
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#define AD5686_CMD_UPDATE_DAC_N 0x2
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#define AD5686_CMD_WRITE_INPUT_N_UPDATE_N 0x3
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#define AD5686_CMD_POWERDOWN_DAC 0x4
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#define AD5686_CMD_LDAC_MASK 0x5
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#define AD5686_CMD_RESET 0x6
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#define AD5686_CMD_INTERNAL_REFER_SETUP 0x7
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#define AD5686_CMD_DAISY_CHAIN_ENABLE 0x8
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#define AD5686_CMD_READBACK_ENABLE 0x9
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#define AD5686_LDAC_PWRDN_NONE 0x0
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#define AD5686_LDAC_PWRDN_1K 0x1
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#define AD5686_LDAC_PWRDN_100K 0x2
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#define AD5686_LDAC_PWRDN_3STATE 0x3
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/**
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* ad5686_supported_device_ids:
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*/
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enum ad5686_supported_device_ids {
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ID_AD5671R,
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ID_AD5672R,
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ID_AD5675R,
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ID_AD5676,
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ID_AD5676R,
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ID_AD5684,
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ID_AD5684R,
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ID_AD5685R,
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ID_AD5686,
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ID_AD5686R,
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ID_AD5694,
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ID_AD5694R,
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ID_AD5695R,
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ID_AD5696,
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ID_AD5696R,
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};
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struct ad5686_state;
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typedef int (*ad5686_write_func)(struct ad5686_state *st,
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u8 cmd, u8 addr, u16 val);
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typedef int (*ad5686_read_func)(struct ad5686_state *st, u8 addr);
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/**
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* struct ad5686_chip_info - chip specific information
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* @int_vref_mv: AD5620/40/60: the internal reference voltage
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* @num_channels: number of channels
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* @channel: channel specification
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*/
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struct ad5686_chip_info {
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u16 int_vref_mv;
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unsigned int num_channels;
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struct iio_chan_spec *channels;
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};
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/**
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* struct ad5446_state - driver instance specific data
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* @spi: spi_device
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* @chip_info: chip model specific constants, available modes etc
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* @reg: supply regulator
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* @vref_mv: actual reference voltage used
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* @pwr_down_mask: power down mask
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* @pwr_down_mode: current power down mode
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* @data: spi transfer buffers
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*/
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struct ad5686_state {
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struct device *dev;
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const struct ad5686_chip_info *chip_info;
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struct regulator *reg;
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unsigned short vref_mv;
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unsigned int pwr_down_mask;
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unsigned int pwr_down_mode;
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ad5686_write_func write;
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ad5686_read_func read;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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*/
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union {
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__be32 d32;
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__be16 d16;
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u8 d8[4];
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} data[3] ____cacheline_aligned;
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};
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int ad5686_probe(struct device *dev,
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enum ad5686_supported_device_ids chip_type,
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const char *name, ad5686_write_func write,
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ad5686_read_func read);
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int ad5686_remove(struct device *dev);
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#endif /* __DRIVERS_IIO_DAC_AD5686_H__ */
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