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https://github.com/edk2-porting/linux-next.git
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dee89c4d94
Liam Girdwood's ASoC v2 work avoids having two different ops structures for DAIs by merging the members of struct snd_soc_ops into struct snd_soc_dai_ops, allowing per DAI configuration for everything. Backport this change. This paves the way for future work allowing any combination of DAIs to be connected rather than having fixed purpose CODEC and CPU DAIs and only allowing CODEC<->CPU interconnections. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
653 lines
16 KiB
C
653 lines
16 KiB
C
/*
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* ALSA SoC TWL4030 codec driver
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*
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* Author: Steve Sakoman, <steve@sakoman.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/platform_device.h>
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#include <linux/i2c/twl4030.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/initval.h>
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#include "twl4030.h"
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/*
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* twl4030 register cache & default register settings
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*/
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static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
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0x00, /* this register not used */
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0x93, /* REG_CODEC_MODE (0x1) */
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0xc3, /* REG_OPTION (0x2) */
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0x00, /* REG_UNKNOWN (0x3) */
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0x00, /* REG_MICBIAS_CTL (0x4) */
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0x24, /* REG_ANAMICL (0x5) */
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0x04, /* REG_ANAMICR (0x6) */
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0x0a, /* REG_AVADC_CTL (0x7) */
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0x00, /* REG_ADCMICSEL (0x8) */
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0x00, /* REG_DIGMIXING (0x9) */
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0x0c, /* REG_ATXL1PGA (0xA) */
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0x0c, /* REG_ATXR1PGA (0xB) */
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0x00, /* REG_AVTXL2PGA (0xC) */
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0x00, /* REG_AVTXR2PGA (0xD) */
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0x01, /* REG_AUDIO_IF (0xE) */
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0x00, /* REG_VOICE_IF (0xF) */
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0x00, /* REG_ARXR1PGA (0x10) */
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0x00, /* REG_ARXL1PGA (0x11) */
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0x6c, /* REG_ARXR2PGA (0x12) */
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0x6c, /* REG_ARXL2PGA (0x13) */
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0x00, /* REG_VRXPGA (0x14) */
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0x00, /* REG_VSTPGA (0x15) */
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0x00, /* REG_VRX2ARXPGA (0x16) */
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0x0c, /* REG_AVDAC_CTL (0x17) */
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0x00, /* REG_ARX2VTXPGA (0x18) */
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0x00, /* REG_ARXL1_APGA_CTL (0x19) */
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0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
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0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
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0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
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0x00, /* REG_ATX2ARXPGA (0x1D) */
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0x00, /* REG_BT_IF (0x1E) */
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0x00, /* REG_BTPGA (0x1F) */
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0x00, /* REG_BTSTPGA (0x20) */
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0x00, /* REG_EAR_CTL (0x21) */
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0x24, /* REG_HS_SEL (0x22) */
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0x0a, /* REG_HS_GAIN_SET (0x23) */
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0x00, /* REG_HS_POPN_SET (0x24) */
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0x00, /* REG_PREDL_CTL (0x25) */
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0x00, /* REG_PREDR_CTL (0x26) */
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0x00, /* REG_PRECKL_CTL (0x27) */
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0x00, /* REG_PRECKR_CTL (0x28) */
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0x00, /* REG_HFL_CTL (0x29) */
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0x00, /* REG_HFR_CTL (0x2A) */
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0x00, /* REG_ALC_CTL (0x2B) */
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0x00, /* REG_ALC_SET1 (0x2C) */
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0x00, /* REG_ALC_SET2 (0x2D) */
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0x00, /* REG_BOOST_CTL (0x2E) */
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0x01, /* REG_SOFTVOL_CTL (0x2F) */
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0x00, /* REG_DTMF_FREQSEL (0x30) */
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0x00, /* REG_DTMF_TONEXT1H (0x31) */
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0x00, /* REG_DTMF_TONEXT1L (0x32) */
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0x00, /* REG_DTMF_TONEXT2H (0x33) */
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0x00, /* REG_DTMF_TONEXT2L (0x34) */
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0x00, /* REG_DTMF_TONOFF (0x35) */
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0x00, /* REG_DTMF_WANONOFF (0x36) */
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0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
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0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
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0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
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0x16, /* REG_APLL_CTL (0x3A) */
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0x00, /* REG_DTMF_CTL (0x3B) */
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0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
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0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
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0x00, /* REG_MISC_SET_1 (0x3E) */
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0x00, /* REG_PCMBTMUX (0x3F) */
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0x00, /* not used (0x40) */
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0x00, /* not used (0x41) */
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0x00, /* not used (0x42) */
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0x00, /* REG_RX_PATH_SEL (0x43) */
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0x00, /* REG_VDL_APGA_CTL (0x44) */
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0x00, /* REG_VIBRA_CTL (0x45) */
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0x00, /* REG_VIBRA_SET (0x46) */
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0x00, /* REG_VIBRA_PWM_SET (0x47) */
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0x00, /* REG_ANAMIC_GAIN (0x48) */
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0x00, /* REG_MISC_SET_2 (0x49) */
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};
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/*
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* read twl4030 register cache
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*/
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static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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u8 *cache = codec->reg_cache;
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return cache[reg];
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}
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/*
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* write twl4030 register cache
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*/
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static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
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u8 reg, u8 value)
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{
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u8 *cache = codec->reg_cache;
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if (reg >= TWL4030_CACHEREGNUM)
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return;
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cache[reg] = value;
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}
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/*
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* write to the twl4030 register space
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*/
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static int twl4030_write(struct snd_soc_codec *codec,
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unsigned int reg, unsigned int value)
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{
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twl4030_write_reg_cache(codec, reg, value);
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return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
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}
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static void twl4030_clear_codecpdz(struct snd_soc_codec *codec)
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{
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u8 mode;
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mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
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twl4030_write(codec, TWL4030_REG_CODEC_MODE,
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mode & ~TWL4030_CODECPDZ);
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/* REVISIT: this delay is present in TI sample drivers */
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/* but there seems to be no TRM requirement for it */
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udelay(10);
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}
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static void twl4030_set_codecpdz(struct snd_soc_codec *codec)
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{
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u8 mode;
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mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
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twl4030_write(codec, TWL4030_REG_CODEC_MODE,
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mode | TWL4030_CODECPDZ);
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/* REVISIT: this delay is present in TI sample drivers */
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/* but there seems to be no TRM requirement for it */
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udelay(10);
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}
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static void twl4030_init_chip(struct snd_soc_codec *codec)
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{
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int i;
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/* clear CODECPDZ prior to setting register defaults */
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twl4030_clear_codecpdz(codec);
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/* set all audio section registers to reasonable defaults */
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for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
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twl4030_write(codec, i, twl4030_reg[i]);
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}
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static const struct snd_kcontrol_new twl4030_snd_controls[] = {
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SOC_DOUBLE_R("Master Playback Volume",
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TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
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0, 0x3f, 0),
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SOC_DOUBLE_R("Capture Volume",
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TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
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0, 0x1f, 0),
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};
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/* add non dapm controls */
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static int twl4030_add_controls(struct snd_soc_codec *codec)
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{
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int err, i;
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for (i = 0; i < ARRAY_SIZE(twl4030_snd_controls); i++) {
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err = snd_ctl_add(codec->card,
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snd_soc_cnew(&twl4030_snd_controls[i],
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codec, NULL));
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if (err < 0)
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return err;
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}
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return 0;
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}
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static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
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SND_SOC_DAPM_INPUT("INL"),
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SND_SOC_DAPM_INPUT("INR"),
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SND_SOC_DAPM_OUTPUT("OUTL"),
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SND_SOC_DAPM_OUTPUT("OUTR"),
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SND_SOC_DAPM_DAC("DACL", "Left Playback", SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_DAC("DACR", "Right Playback", SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_ADC("ADCL", "Left Capture", SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_ADC("ADCR", "Right Capture", SND_SOC_NOPM, 0, 0),
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};
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static const struct snd_soc_dapm_route intercon[] = {
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/* outputs */
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{"OUTL", NULL, "DACL"},
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{"OUTR", NULL, "DACR"},
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/* inputs */
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{"ADCL", NULL, "INL"},
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{"ADCR", NULL, "INR"},
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};
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static int twl4030_add_widgets(struct snd_soc_codec *codec)
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{
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snd_soc_dapm_new_controls(codec, twl4030_dapm_widgets,
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ARRAY_SIZE(twl4030_dapm_widgets));
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snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
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snd_soc_dapm_new_widgets(codec);
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return 0;
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}
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static void twl4030_power_up(struct snd_soc_codec *codec)
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{
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u8 anamicl, regmisc1, byte, popn, hsgain;
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int i = 0;
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/* set CODECPDZ to turn on codec */
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twl4030_set_codecpdz(codec);
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/* initiate offset cancellation */
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anamicl = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
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twl4030_write(codec, TWL4030_REG_ANAMICL,
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anamicl | TWL4030_CNCL_OFFSET_START);
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/* wait for offset cancellation to complete */
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do {
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/* this takes a little while, so don't slam i2c */
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udelay(2000);
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twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
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TWL4030_REG_ANAMICL);
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} while ((i++ < 100) &&
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((byte & TWL4030_CNCL_OFFSET_START) ==
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TWL4030_CNCL_OFFSET_START));
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/* anti-pop when changing analog gain */
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regmisc1 = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
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twl4030_write(codec, TWL4030_REG_MISC_SET_1,
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regmisc1 | TWL4030_SMOOTH_ANAVOL_EN);
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/* toggle CODECPDZ as per TRM */
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twl4030_clear_codecpdz(codec);
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twl4030_set_codecpdz(codec);
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/* program anti-pop with bias ramp delay */
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popn = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
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popn &= TWL4030_RAMP_DELAY;
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popn |= TWL4030_RAMP_DELAY_645MS;
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twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
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popn |= TWL4030_VMID_EN;
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twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
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/* enable output stage and gain setting */
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hsgain = TWL4030_HSR_GAIN_0DB | TWL4030_HSL_GAIN_0DB;
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twl4030_write(codec, TWL4030_REG_HS_GAIN_SET, hsgain);
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/* enable anti-pop ramp */
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popn |= TWL4030_RAMP_EN;
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twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
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}
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static void twl4030_power_down(struct snd_soc_codec *codec)
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{
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u8 popn, hsgain;
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/* disable anti-pop ramp */
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popn = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
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popn &= ~TWL4030_RAMP_EN;
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twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
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/* disable output stage and gain setting */
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hsgain = TWL4030_HSR_GAIN_PWR_DOWN | TWL4030_HSL_GAIN_PWR_DOWN;
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twl4030_write(codec, TWL4030_REG_HS_GAIN_SET, hsgain);
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/* disable bias out */
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popn &= ~TWL4030_VMID_EN;
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twl4030_write(codec, TWL4030_REG_HS_POPN_SET, popn);
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/* power down */
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twl4030_clear_codecpdz(codec);
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}
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static int twl4030_set_bias_level(struct snd_soc_codec *codec,
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enum snd_soc_bias_level level)
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{
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switch (level) {
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case SND_SOC_BIAS_ON:
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twl4030_power_up(codec);
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break;
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case SND_SOC_BIAS_PREPARE:
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/* TODO: develop a twl4030_prepare function */
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break;
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case SND_SOC_BIAS_STANDBY:
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/* TODO: develop a twl4030_standby function */
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twl4030_power_down(codec);
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break;
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case SND_SOC_BIAS_OFF:
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twl4030_power_down(codec);
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break;
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}
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codec->bias_level = level;
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return 0;
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}
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static int twl4030_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_device *socdev = rtd->socdev;
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struct snd_soc_codec *codec = socdev->codec;
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u8 mode, old_mode, format, old_format;
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/* bit rate */
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old_mode = twl4030_read_reg_cache(codec,
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TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
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mode = old_mode & ~TWL4030_APLL_RATE;
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switch (params_rate(params)) {
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case 8000:
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mode |= TWL4030_APLL_RATE_8000;
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break;
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case 11025:
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mode |= TWL4030_APLL_RATE_11025;
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break;
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case 12000:
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mode |= TWL4030_APLL_RATE_12000;
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break;
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case 16000:
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mode |= TWL4030_APLL_RATE_16000;
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break;
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case 22050:
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mode |= TWL4030_APLL_RATE_22050;
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break;
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case 24000:
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mode |= TWL4030_APLL_RATE_24000;
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break;
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case 32000:
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mode |= TWL4030_APLL_RATE_32000;
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break;
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case 44100:
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mode |= TWL4030_APLL_RATE_44100;
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break;
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case 48000:
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mode |= TWL4030_APLL_RATE_48000;
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break;
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default:
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printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
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params_rate(params));
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return -EINVAL;
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}
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if (mode != old_mode) {
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/* change rate and set CODECPDZ */
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twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
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twl4030_set_codecpdz(codec);
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}
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/* sample size */
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old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
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format = old_format;
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format &= ~TWL4030_DATA_WIDTH;
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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format |= TWL4030_DATA_WIDTH_16S_16W;
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break;
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case SNDRV_PCM_FORMAT_S24_LE:
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format |= TWL4030_DATA_WIDTH_32S_24W;
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break;
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default:
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printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
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params_format(params));
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return -EINVAL;
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}
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if (format != old_format) {
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/* clear CODECPDZ before changing format (codec requirement) */
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twl4030_clear_codecpdz(codec);
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/* change format */
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twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
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/* set CODECPDZ afterwards */
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twl4030_set_codecpdz(codec);
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}
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return 0;
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}
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static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
|
|
int clk_id, unsigned int freq, int dir)
|
|
{
|
|
struct snd_soc_codec *codec = codec_dai->codec;
|
|
u8 infreq;
|
|
|
|
switch (freq) {
|
|
case 19200000:
|
|
infreq = TWL4030_APLL_INFREQ_19200KHZ;
|
|
break;
|
|
case 26000000:
|
|
infreq = TWL4030_APLL_INFREQ_26000KHZ;
|
|
break;
|
|
case 38400000:
|
|
infreq = TWL4030_APLL_INFREQ_38400KHZ;
|
|
break;
|
|
default:
|
|
printk(KERN_ERR "TWL4030 set sysclk: unknown rate %d\n",
|
|
freq);
|
|
return -EINVAL;
|
|
}
|
|
|
|
infreq |= TWL4030_APLL_EN;
|
|
twl4030_write(codec, TWL4030_REG_APLL_CTL, infreq);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
|
|
unsigned int fmt)
|
|
{
|
|
struct snd_soc_codec *codec = codec_dai->codec;
|
|
u8 old_format, format;
|
|
|
|
/* get format */
|
|
old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
|
|
format = old_format;
|
|
|
|
/* set master/slave audio interface */
|
|
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
|
case SND_SOC_DAIFMT_CBM_CFM:
|
|
format &= ~(TWL4030_AIF_SLAVE_EN);
|
|
format &= ~(TWL4030_CLK256FS_EN);
|
|
break;
|
|
case SND_SOC_DAIFMT_CBS_CFS:
|
|
format |= TWL4030_AIF_SLAVE_EN;
|
|
format |= TWL4030_CLK256FS_EN;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* interface format */
|
|
format &= ~TWL4030_AIF_FORMAT;
|
|
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
|
case SND_SOC_DAIFMT_I2S:
|
|
format |= TWL4030_AIF_FORMAT_CODEC;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (format != old_format) {
|
|
|
|
/* clear CODECPDZ before changing format (codec requirement) */
|
|
twl4030_clear_codecpdz(codec);
|
|
|
|
/* change format */
|
|
twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
|
|
|
|
/* set CODECPDZ afterwards */
|
|
twl4030_set_codecpdz(codec);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
|
|
#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
|
|
|
|
struct snd_soc_dai twl4030_dai = {
|
|
.name = "twl4030",
|
|
.playback = {
|
|
.stream_name = "Playback",
|
|
.channels_min = 2,
|
|
.channels_max = 2,
|
|
.rates = TWL4030_RATES,
|
|
.formats = TWL4030_FORMATS,},
|
|
.capture = {
|
|
.stream_name = "Capture",
|
|
.channels_min = 2,
|
|
.channels_max = 2,
|
|
.rates = TWL4030_RATES,
|
|
.formats = TWL4030_FORMATS,},
|
|
.ops = {
|
|
.hw_params = twl4030_hw_params,
|
|
.set_sysclk = twl4030_set_dai_sysclk,
|
|
.set_fmt = twl4030_set_dai_fmt,
|
|
}
|
|
};
|
|
EXPORT_SYMBOL_GPL(twl4030_dai);
|
|
|
|
static int twl4030_suspend(struct platform_device *pdev, pm_message_t state)
|
|
{
|
|
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
|
|
struct snd_soc_codec *codec = socdev->codec;
|
|
|
|
twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int twl4030_resume(struct platform_device *pdev)
|
|
{
|
|
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
|
|
struct snd_soc_codec *codec = socdev->codec;
|
|
|
|
twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
|
twl4030_set_bias_level(codec, codec->suspend_bias_level);
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* initialize the driver
|
|
* register the mixer and dsp interfaces with the kernel
|
|
*/
|
|
|
|
static int twl4030_init(struct snd_soc_device *socdev)
|
|
{
|
|
struct snd_soc_codec *codec = socdev->codec;
|
|
int ret = 0;
|
|
|
|
printk(KERN_INFO "TWL4030 Audio Codec init \n");
|
|
|
|
codec->name = "twl4030";
|
|
codec->owner = THIS_MODULE;
|
|
codec->read = twl4030_read_reg_cache;
|
|
codec->write = twl4030_write;
|
|
codec->set_bias_level = twl4030_set_bias_level;
|
|
codec->dai = &twl4030_dai;
|
|
codec->num_dai = 1;
|
|
codec->reg_cache_size = sizeof(twl4030_reg);
|
|
codec->reg_cache = kmemdup(twl4030_reg, sizeof(twl4030_reg),
|
|
GFP_KERNEL);
|
|
if (codec->reg_cache == NULL)
|
|
return -ENOMEM;
|
|
|
|
/* register pcms */
|
|
ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
|
|
if (ret < 0) {
|
|
printk(KERN_ERR "twl4030: failed to create pcms\n");
|
|
goto pcm_err;
|
|
}
|
|
|
|
twl4030_init_chip(codec);
|
|
|
|
/* power on device */
|
|
twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
|
|
|
|
twl4030_add_controls(codec);
|
|
twl4030_add_widgets(codec);
|
|
|
|
ret = snd_soc_register_card(socdev);
|
|
if (ret < 0) {
|
|
printk(KERN_ERR "twl4030: failed to register card\n");
|
|
goto card_err;
|
|
}
|
|
|
|
return ret;
|
|
|
|
card_err:
|
|
snd_soc_free_pcms(socdev);
|
|
snd_soc_dapm_free(socdev);
|
|
pcm_err:
|
|
kfree(codec->reg_cache);
|
|
return ret;
|
|
}
|
|
|
|
static struct snd_soc_device *twl4030_socdev;
|
|
|
|
static int twl4030_probe(struct platform_device *pdev)
|
|
{
|
|
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
|
|
struct snd_soc_codec *codec;
|
|
|
|
codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
|
|
if (codec == NULL)
|
|
return -ENOMEM;
|
|
|
|
socdev->codec = codec;
|
|
mutex_init(&codec->mutex);
|
|
INIT_LIST_HEAD(&codec->dapm_widgets);
|
|
INIT_LIST_HEAD(&codec->dapm_paths);
|
|
|
|
twl4030_socdev = socdev;
|
|
twl4030_init(socdev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int twl4030_remove(struct platform_device *pdev)
|
|
{
|
|
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
|
|
struct snd_soc_codec *codec = socdev->codec;
|
|
|
|
printk(KERN_INFO "TWL4030 Audio Codec remove\n");
|
|
kfree(codec);
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct snd_soc_codec_device soc_codec_dev_twl4030 = {
|
|
.probe = twl4030_probe,
|
|
.remove = twl4030_remove,
|
|
.suspend = twl4030_suspend,
|
|
.resume = twl4030_resume,
|
|
};
|
|
EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030);
|
|
|
|
MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
|
|
MODULE_AUTHOR("Steve Sakoman");
|
|
MODULE_LICENSE("GPL");
|