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87ba9e5962
Some dividers might have a maximum value that is lower than the width of the register. Add a field to _ccu_div to handle those case properly. If the field is set to 0, the code will assume that the maximum value is the maximum one that can be used with the field register width. Otherwise, we'll use whatever value has been set. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
119 lines
2.9 KiB
C
119 lines
2.9 KiB
C
/*
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* Copyright (C) 2016 Maxime Ripard
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* Maxime Ripard <maxime.ripard@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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#include <linux/clk-provider.h>
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#include <linux/rational.h>
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#include "ccu_frac.h"
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#include "ccu_gate.h"
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#include "ccu_nm.h"
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static void ccu_nm_disable(struct clk_hw *hw)
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{
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struct ccu_nm *nm = hw_to_ccu_nm(hw);
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return ccu_gate_helper_disable(&nm->common, nm->enable);
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}
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static int ccu_nm_enable(struct clk_hw *hw)
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{
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struct ccu_nm *nm = hw_to_ccu_nm(hw);
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return ccu_gate_helper_enable(&nm->common, nm->enable);
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}
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static int ccu_nm_is_enabled(struct clk_hw *hw)
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{
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struct ccu_nm *nm = hw_to_ccu_nm(hw);
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return ccu_gate_helper_is_enabled(&nm->common, nm->enable);
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}
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static unsigned long ccu_nm_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct ccu_nm *nm = hw_to_ccu_nm(hw);
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unsigned long n, m;
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u32 reg;
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if (ccu_frac_helper_is_enabled(&nm->common, &nm->frac))
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return ccu_frac_helper_read_rate(&nm->common, &nm->frac);
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reg = readl(nm->common.base + nm->common.reg);
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n = reg >> nm->n.shift;
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n &= (1 << nm->n.width) - 1;
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m = reg >> nm->m.shift;
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m &= (1 << nm->m.width) - 1;
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return parent_rate * (n + 1) / (m + 1);
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}
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static long ccu_nm_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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struct ccu_nm *nm = hw_to_ccu_nm(hw);
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unsigned long max_n, max_m;
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unsigned long n, m;
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max_n = 1 << nm->n.width;
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max_m = nm->m.max ?: 1 << nm->m.width;
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rational_best_approximation(rate, *parent_rate, max_n, max_m, &n, &m);
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return *parent_rate * n / m;
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}
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static int ccu_nm_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct ccu_nm *nm = hw_to_ccu_nm(hw);
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unsigned long flags;
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unsigned long max_n, max_m;
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unsigned long n, m;
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u32 reg;
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if (ccu_frac_helper_has_rate(&nm->common, &nm->frac, rate))
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return ccu_frac_helper_set_rate(&nm->common, &nm->frac, rate);
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else
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ccu_frac_helper_disable(&nm->common, &nm->frac);
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max_n = 1 << nm->n.width;
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max_m = nm->m.max ?: 1 << nm->m.width;
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rational_best_approximation(rate, parent_rate, max_n, max_m, &n, &m);
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spin_lock_irqsave(nm->common.lock, flags);
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reg = readl(nm->common.base + nm->common.reg);
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reg &= ~GENMASK(nm->n.width + nm->n.shift - 1, nm->n.shift);
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reg &= ~GENMASK(nm->m.width + nm->m.shift - 1, nm->m.shift);
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writel(reg | ((m - 1) << nm->m.shift) | ((n - 1) << nm->n.shift),
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nm->common.base + nm->common.reg);
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spin_unlock_irqrestore(nm->common.lock, flags);
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ccu_helper_wait_for_lock(&nm->common, nm->lock);
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return 0;
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}
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const struct clk_ops ccu_nm_ops = {
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.disable = ccu_nm_disable,
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.enable = ccu_nm_enable,
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.is_enabled = ccu_nm_is_enabled,
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.recalc_rate = ccu_nm_recalc_rate,
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.round_rate = ccu_nm_round_rate,
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.set_rate = ccu_nm_set_rate,
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};
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