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https://github.com/edk2-porting/linux-next.git
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61890ccaef
This patch adds driver for MediaTek's Media Data Path ver.3 (MDP3).
It provides the following functions:
color transform, format conversion, resize, crop, rotate, flip
and additional image quality enhancement.
The MDP3 driver is mainly used for Google Chromebook products to
import the new architecture to set the HW settings as shown below:
User -> V4L2 framework
-> MDP3 driver -> SCP (setting calculations)
-> MDP3 driver -> CMDQ (GCE driver) -> HW
Each modules' related operation control is sited in mtk-mdp3-comp.c
Each modules' register table is defined in file with "mdp_reg_" prefix
GCE related API, operation control sited in mtk-mdp3-cmdq.c
V4L2 m2m device functions are implemented in mtk-mdp3-m2m.c
Probe, power, suspend/resume, system level functions are defined in
mtk-mdp3-core.c
[hverkuil: add 'depends on REMOTEPROC']
Signed-off-by: Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
Signed-off-by: daoyuan huang <daoyuan.huang@mediatek.com>
Signed-off-by: Moudy Ho <moudy.ho@mediatek.com>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
40 lines
1.9 KiB
C
40 lines
1.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2022 MediaTek Inc.
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* Author: Ping-Hsun Wu <ping-hsun.wu@mediatek.com>
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*/
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#ifndef __MDP_REG_RSZ_H__
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#define __MDP_REG_RSZ_H__
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#define PRZ_ENABLE 0x000
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#define PRZ_CONTROL_1 0x004
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#define PRZ_CONTROL_2 0x008
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#define PRZ_INPUT_IMAGE 0x010
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#define PRZ_OUTPUT_IMAGE 0x014
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#define PRZ_HORIZONTAL_COEFF_STEP 0x018
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#define PRZ_VERTICAL_COEFF_STEP 0x01c
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#define PRZ_LUMA_HORIZONTAL_INTEGER_OFFSET 0x020
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#define PRZ_LUMA_HORIZONTAL_SUBPIXEL_OFFSET 0x024
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#define PRZ_LUMA_VERTICAL_INTEGER_OFFSET 0x028
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#define PRZ_LUMA_VERTICAL_SUBPIXEL_OFFSET 0x02c
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#define PRZ_CHROMA_HORIZONTAL_INTEGER_OFFSET 0x030
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#define PRZ_CHROMA_HORIZONTAL_SUBPIXEL_OFFSET 0x034
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/* MASK */
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#define PRZ_ENABLE_MASK 0x00010001
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#define PRZ_CONTROL_1_MASK 0xfffffff3
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#define PRZ_CONTROL_2_MASK 0x0ffffaff
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#define PRZ_INPUT_IMAGE_MASK 0xffffffff
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#define PRZ_OUTPUT_IMAGE_MASK 0xffffffff
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#define PRZ_HORIZONTAL_COEFF_STEP_MASK 0x007fffff
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#define PRZ_VERTICAL_COEFF_STEP_MASK 0x007fffff
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#define PRZ_LUMA_HORIZONTAL_INTEGER_OFFSET_MASK 0x0000ffff
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#define PRZ_LUMA_HORIZONTAL_SUBPIXEL_OFFSET_MASK 0x001fffff
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#define PRZ_LUMA_VERTICAL_INTEGER_OFFSET_MASK 0x0000ffff
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#define PRZ_LUMA_VERTICAL_SUBPIXEL_OFFSET_MASK 0x001fffff
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#define PRZ_CHROMA_HORIZONTAL_INTEGER_OFFSET_MASK 0x0000ffff
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#define PRZ_CHROMA_HORIZONTAL_SUBPIXEL_OFFSET_MASK 0x001fffff
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#endif // __MDP_REG_RSZ_H__
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